03-31-2017 01:23 AM
Is this even possible? Is there a procedure which will generate identical bit files on two different computers on Vivado 2015.4+?
I have two Windows computers both running the same version of Vivado (2015.4, SW build 1412921, IP build 14121260). Both are implementing what appears to be exactly the same design, but are producing (very) different bit files.
The two computers can't even produce the same dcp for the same xci file. Some of these differences are straightforward - the xdc and EDIF files contain directory paths and time stamps, for example, but the binary shape file also differs, and the difference appears to be unrelated to anything obvious.
What were cost tables replaced with in Vivado? Hopefully it's not generating a random seed which can't be fixed or changed?
04-04-2017 12:44 AM
Thanks - hadn't seen that AR, and it is (fairly) useful.
I've now implemented this design on 3 different computers - two Windows 7 SP1 64-bit, and one Centos 7.3.1611, 64-bit. All three are running Vivado 2015.4, SW build 1412921, IP build 1412160, all with default threading options.
All 3 produce the same MCS file, except that the Windows ones have DOS line endings.
03-31-2017 01:30 AM
Hi @eml
Check this AR on repeatability https://www.xilinx.com/support/answers/61599.html
03-31-2017 01:43 AM
if the design is implemented again the bit files may not be identical because, there is no guarantee that all FF will be placed in the same location. even functionality and performance may be the same, the two implementations may not be identical. you'll have to test and verify the design and not rely on bit file comparison. The bulk of a bit file is binary, however the header has ascii text information within it.You can open the bit file with Notepad for example and see this information at the very beginning of a bit file
You may want to compare the dates in the bit file header to the file creation dates from your source. The only way to end up with the same bit file would be to have the exact same sources, ISE version including service packs, and ISE process settings for all of the build processes (synthesis, translate, map, P&R, bitgen). Even then you would have a difference in the bit file header because
it contains information like creation date.
check this post as well
https://forums.xilinx.com/t5/Embedded-Development-Tools/Vivado-Zynq-Zedboard-workflow-two-bit-files-are-created-How-do/td-p/565468
03-31-2017 02:30 AM
>>The two computers can't even produce the same dcp for the same xci file.
This is not expected, for the same XCI settings tool should generate same netlist? How did you verify this?
If the synthesis results are different then definitely bit files will differ. Check the exact phase where tool is behaving differently.
>>What were cost tables replaced with in Vivado?
Check this SR: https://www.xilinx.com/support/answers/54776.html
Thanks,
Anusheel
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04-04-2017 12:44 AM
Thanks - hadn't seen that AR, and it is (fairly) useful.
I've now implemented this design on 3 different computers - two Windows 7 SP1 64-bit, and one Centos 7.3.1611, 64-bit. All three are running Vivado 2015.4, SW build 1412921, IP build 1412160, all with default threading options.
All 3 produce the same MCS file, except that the Windows ones have DOS line endings.