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Visitor vuphong
Visitor
6,725 Views
Registered: ‎01-17-2017

How to know Power Consumption per clock cycle of a processor design?

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Hi everyone.

I'm trying to build a simulator, which calculate energy consumption of an applications implemented in MIPS ISA.

To do this, I need to know the power consumption of each clock cycle of the processor, then multiply with number of cycles it takes to finish the application.

I have been trying to use XPower Analyzer (Xilinx ISE) to find out power consumption of this processor. 

(Btw, it is TigerMIPS processor, you can find it here: http://www.cl.cam.ac.uk/teaching/0910/ECAD+Arch/tutorials/tigermips.pdf)

The result is something like this: 

2.3.  Power Supply Summary
----------------------------------------------------------
|                  Power Supply Summary                  |
----------------------------------------------------------
|                      | Total  | Dynamic | Static Power |
----------------------------------------------------------
| Supply Power (mW)    | 820.63 | 106.37  | 714.26       |
----------------------------------------------------------
 
---------------------------------------------------------------------------------------------------------------
|                                            Power Supply Currents                                            |
---------------------------------------------------------------------------------------------------------------
|     Supply Source     | Supply Voltage | Total Current (mA) | Dynamic Current (mA) | Quiescent Current (mA) |
---------------------------------------------------------------------------------------------------------------
| Vccint                |          0.950 |             635.02 |                51.59 |                 583.43 |
| Vccaux                |          2.500 |              61.19 |                 1.19 |                  60.00 |
| Vcco25                |          2.500 |              25.76 |                21.76 |                   4.00 |
---------------------------------------------------------------------------------------------------------------
 
I don't think this is what I want, since 820mW is too much for one cycle. But I don't know how else can I find out power consumption of each cycle of this processor. Can someone help me, please?
Thank you very much for reading this.
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1 Solution

Accepted Solutions
Scholar u4223374
Scholar
11,914 Views
Registered: ‎04-26-2015

Re: How to know Power Consumption per clock cycle of a processor design?

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Energy consumption per clock cycle doesn't really make sense anyway, for what you're doing. It's not a fixed value - while static power will be constant, dynamic power will change significantly depending on the instructions and data being processed. An application that spends 99% of its time asleep, waiting for an interrupt, will have a very low dynamic power. One that's continually reading from memory, writing to memory, and doing maths in between will have fairly high power.

 

As a very rough approximation, you could say that if the processor runs at 100MHz (10ns period) then the energy consumed per cycle is about 8.2nJ (based on the XPA summary). However, this is really not something you should rely on for power consumption of each application - even to an order of magnitude estimate.

9 Replies
Xilinx Employee
Xilinx Employee
6,695 Views
Registered: ‎08-01-2012

Re: How to know Power Consumption per clock cycle of a processor design?

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I do not think it is possible to know the power consumption of each clock cycle separately by using XPA tool.

 

________________________________________________

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Scholar austin
Scholar
6,691 Views
Registered: ‎02-27-2008

Re: How to know Power Consumption per clock cycle of a processor design?

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I agree,

 

XPA delivers the predicted total power.  In that sense, the power at a clock edge is the dynamic value, averaged over the entire clock period.  Knowing the peak power isn't needed.  The bypassing we suggest is more than adequate to handle it.

 

 

Austin Lesea
Principal Engineer
Xilinx San Jose
Teacher muzaffer
Teacher
6,678 Views
Registered: ‎03-31-2012

Re: How to know Power Consumption per clock cycle of a processor design?

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@vuphong XPA tool doesn't have this granularity. If you want cycle based energy consumption at a reasonable accuracy, you need to generate a netlist and read in the library files into a power estimation tool. There are also RTL level power estimation tools which you can use.

- Please mark the Answer as "Accept as solution" if information provided is helpful.
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Scholar u4223374
Scholar
11,915 Views
Registered: ‎04-26-2015

Re: How to know Power Consumption per clock cycle of a processor design?

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Energy consumption per clock cycle doesn't really make sense anyway, for what you're doing. It's not a fixed value - while static power will be constant, dynamic power will change significantly depending on the instructions and data being processed. An application that spends 99% of its time asleep, waiting for an interrupt, will have a very low dynamic power. One that's continually reading from memory, writing to memory, and doing maths in between will have fairly high power.

 

As a very rough approximation, you could say that if the processor runs at 100MHz (10ns period) then the energy consumed per cycle is about 8.2nJ (based on the XPA summary). However, this is really not something you should rely on for power consumption of each application - even to an order of magnitude estimate.

Visitor vuphong
Visitor
6,579 Views
Registered: ‎01-17-2017

Re: How to know Power Consumption per clock cycle of a processor design?

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Thank you very much for all your replies. And sorry for my late response. 

If I know the power consumption of the processor P(W), frequency F(Hz) and number of cycles N is executed. Can I calculate the energy consumption like: E = P*(N/F)?

Thank you!

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Scholar u4223374
Scholar
6,562 Views
Registered: ‎04-26-2015

Re: How to know Power Consumption per clock cycle of a processor design?

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Doing it like that isn't really valid, because it assumes that P is constant. This is not true; P depends on both the instructions and the data being processed. Doing a bunch of no-ops is likely to use very little power, compared to multiplication. On the other hand, multiplying zero-times-zero repeatedly is also likely to have relatively low dynamic power because the gates never change state.

Visitor vuphong
Visitor
6,517 Views
Registered: ‎01-17-2017

Re: How to know Power Consumption per clock cycle of a processor design?

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Thank you for your reply!

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Observer zineb
Observer
3,789 Views
Registered: ‎11-02-2017

Re: How to know Power Consumption of a design?

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hi,

i designed my architecture that contains, 2 microblazes, local memory, timer,... in the EDK with the AXI bus and everything is going right. my goal now is to estimate the power consummed by each component of this architecture?

first of all is that possible?

if it is how can i do that?i tried to use the XPE(xilinx power estimator) tool but i don't know how does it work even when i read the documentation, should i export my designe from the EDK to the XPE or there is a method to estimate the energy in the ISE too?

i'm so confused since i don't have any idea.

i'll be so thankful for ur answers!

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Observer zineb
Observer
3,092 Views
Registered: ‎11-02-2017

Re: How to know Power Consumption per clock cycle of a processor design?

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hi @vuphong the power you get was it after executing the application or what?

i mean how did you get this results?

 

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