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Visitor jhinkle
Visitor
421 Views
Registered: ‎06-07-2012

I think XST is removing FF it should not - if so - how do I prevent

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Spartan 6 design using ISE -- my very first design so I'm still learning.

XST issues a the following warning

INFO:Xst:2261 - The FF/Latch <Aux_B/Block_Mem_Write_Addr_0> in Unit <Pixel_FPGA> is equivalent to the following FF/Latch, which will be removed : <Main_BD/Block_Mem_Write_Addr_0>
INFO:Xst:2261 - The FF/Latch <Aux_B/Block_Mem_Write_Addr_1> in Unit <Pixel_FPGA> is equivalent to the following FF/Latch, which will be removed : <Main_BD/Block_Mem_Write_Addr_1>
INFO:Xst:2261 - The FF/Latch <Aux_B/Block_Mem_Write_Addr_2> in Unit <Pixel_FPGA> is equivalent to the following FF/Latch, which will be removed : <Main_BD/Block_Mem_Write_Addr_2>
INFO:Xst:2261 - The FF/Latch <Aux_B/Block_Mem_Write_Addr_3> in Unit <Pixel_FPGA> is equivalent to the following FF/Latch, which will be removed : <Main_BD/Block_Mem_Write_Addr_3>
INFO:Xst:2261 - The FF/Latch <Aux_B/Block_Mem_Write_Addr_4> in Unit <Pixel_FPGA> is equivalent to the following FF/Latch, which will be removed : <Main_BD/Block_Mem_Write_Addr_4>
INFO:Xst:2261 - The FF/Latch <Aux_B/Block_Mem_Write_Addr_5> in Unit <Pixel_FPGA> is equivalent to the following FF/Latch, which will be removed : <Main_BD/Block_Mem_Write_Addr_5>
INFO:Xst:2261 - The FF/Latch <Aux_B/Block_Mem_Write_Addr_6> in Unit <Pixel_FPGA> is equivalent to the following FF/Latch, which will be removed : <Main_BD/Block_Mem_Write_Addr_6>
INFO:Xst:2261 - The FF/Latch <Aux_B/Block_Mem_Write_Addr_7> in Unit <Pixel_FPGA> is equivalent to the following FF/Latch, which will be removed : <Main_BD/Block_Mem_Write_Addr_7>
INFO:Xst:2261 - The FF/Latch <Aux_B/Block_Mem_Write_Addr_8> in Unit <Pixel_FPGA> is equivalent to the following FF/Latch, which will be removed : <Main_BD/Block_Mem_Write_Addr_8>
INFO:Xst:2261 - The FF/Latch <Aux_B/Block_Mem_Write_Addr_9> in Unit <Pixel_FPGA> is equivalent to the following FF/Latch, which will be removed : <Main_BD/Block_Mem_Write_Addr_9>

 

My concern is that XST thinks that those two register are the same so it is removing one of them from design -- very BAD!

Top level module defines 3 different boards (FPGA externally drives 3 physically different boards).

Board 1 is called Main_BD.

The other two boards are called Aux_A and Aux_B.

Within module Main_BD the following is declared

reg [10:0] Block_Mem_Write_Addr;

Module DB is addressing the write port on 8x2k memory blocks

Within each of the two AUX modules (A and B) the following is declared

reg [9:0] Block_Mem_Write_Addr;

Both Aux_A and Aux_B are addressing their own unique set of 8x1k memory blocks.

Hopefully by my explaination above it can be seen that the three modules have nothing in common (even those internall I use the same name).

So back to my concern.

Are the warning above stating that XST things the register Block_Mem_Write_Addr residing in Aux_B is the same register Block_Mem_Write_Addr within Main_BD are is removing the register from Aux_B.

If that is really the case - how do I prevent that from happening.

Thanks.

Joe

 

 

 

 

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Moderator
Moderator
332 Views
Registered: ‎03-16-2017

Re: I think XST is removing FF it should not - if so - how do I prevent

Jump to solution

Hi @jhinkle,

FYI:

>>My concern is that XST thinks that those two register are the same so it is removing one of them from design -- very BAD!

ISE optimize or remove equivalent registers by default in your design. If you do not want to remove it then you can disable "Equivalent Register Removal" option from the synthesis properties. 

Check https://www.xilinx.com/support/answers/20476.html for more info on it. 

 

The KEEP HIERARCHY :

If you set this option to "yes", tool preserves the heirarchy described in HDL project and it is propogated to implementation.

If you set this option to "soft", heirarchy is preserved in synthesis but not propogated to implementation.

https://www.xilinx.com/support/documentation/sw_manuals/xilinx14_7/xst_v6s6.pdf (page # 340). 

 

Since your issue has been resolved already please close the thread by marking it as accepted solution. 

 

Regards,
hemangd

Don't forget to give kudos and mark it as accepted solution if your issue gets resolved.
2 Replies
Visitor jhinkle
Visitor
406 Views
Registered: ‎06-07-2012

Re: I think XST is removing FF it should not - if so - how do I prevent

Jump to solution

I turned on "Keep Hierarchy" and the warnings went away - so I guess I fixed it.

That's scarry that a simple switch can cause an implementation issue that would difficult to find had I not closely read the waring issued by XST.

Thanks.

Joe

 

0 Kudos
Moderator
Moderator
333 Views
Registered: ‎03-16-2017

Re: I think XST is removing FF it should not - if so - how do I prevent

Jump to solution

Hi @jhinkle,

FYI:

>>My concern is that XST thinks that those two register are the same so it is removing one of them from design -- very BAD!

ISE optimize or remove equivalent registers by default in your design. If you do not want to remove it then you can disable "Equivalent Register Removal" option from the synthesis properties. 

Check https://www.xilinx.com/support/answers/20476.html for more info on it. 

 

The KEEP HIERARCHY :

If you set this option to "yes", tool preserves the heirarchy described in HDL project and it is propogated to implementation.

If you set this option to "soft", heirarchy is preserved in synthesis but not propogated to implementation.

https://www.xilinx.com/support/documentation/sw_manuals/xilinx14_7/xst_v6s6.pdf (page # 340). 

 

Since your issue has been resolved already please close the thread by marking it as accepted solution. 

 

Regards,
hemangd

Don't forget to give kudos and mark it as accepted solution if your issue gets resolved.