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zalfrin
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Registered: ‎01-08-2020

OOC synthesis and cross boundary optimization

I have been experimenting with OOC synthesis to improve compile times. Previously I was using global synthesis with the Flow_AreaOptimized_high strategy. My design is entirely in the IP Integrator at this point, so when I go to OOC, each IP block gets synthesized separately.

OOC does indeed speed up builds quite a bit (2x faster, after the 1st run to generate all the ipcache contents, which is 2x slower), however the logic utilization end up being ~10% higher versus my old global flow. I tried forcing the OOC synthesis runs to use the areaoptimized strategy, but this made little to no difference.

From comparing the synthesis logs of global vs OOC flows, I think the lack of cross boundary optimization is where the utilization bloat is coming from. I'm wondering if anyone has experimented with a hybrid flow that would allow you to get the compile time improvements from IP caching without losing the optimizations that come from global synthesis.

I'm envisioning something like the initial netlists getting pulled from the IP cache, the blackboxes in the top level synthesis run getting filled in, and then a global synthesis happening that removes the DONT_TOUCH constraints from the IP so that optimizations can occur.

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anusheel
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Registered: ‎07-21-2014

@zalfrin 

How about using Incremental Synthesis and making use of the IP Global Synthesis? This way you can improve the runtime and maintain the logic utilization.

Blog on Incremental Synthesis Flow: 
https://forums.xilinx.com/t5/Design-and-Debug-Techniques-Blog/Vivado-Incremental-Synthesis-Flow/ba-p/976545

Thanks
Anusheel 

dpaul24
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Registered: ‎08-07-2014

@zalfrin ,

As you have already observed OOC does speed up the process. For a previous project initially we were using Global but as the design matured and came to completion we changed to OCC and observed noticeable speed.

From comparing the synthesis logs of global vs OOC flows, I think the lack of cross boundary optimization is where the utilization bloat is coming from. I'm wondering if anyone has experimented with a hybrid flow that would allow you to get the compile time improvements from IP caching without losing the optimizations that come from global synthesis.

But such a evaluation, I have never performed.

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zalfrin
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Registered: ‎01-08-2020

That's a good idea. I'd seen that blog post, and it mentions support for incremental synthesis was added in Vivado 2019.1... I'm currently using 2018.3, but I see -incremental_synth as an option for write_checkpoint. Was there partial support in 2018.3 or something?

I actually tried enabling incremental synthesis when I was testing runtime improvement options (again, using 2018.3). I was always getting this error though: CRITICAL WARNING: [Synth 8-6840] The reference checkpoint is not suitable for use with incremental synthesis for this design. Please regenerate the checkpoint for this design with -incremental_synth switch. Synthesis will continue with the default flow.

The checkpoint I was trying to use was definitely written with the -incremental_synth switch, so maybe this is just because I'm using 2018.3?
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anusheel
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Registered: ‎07-21-2014

@zalfrin,

In that case, the suggestion will not help here. 2018.3 should not be used for incremental synthesis. 

Thanks
Anusheel

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