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19,463 Views
Registered: ‎01-30-2014

TclStackFree: incorrect freePtr. Call out of sequence?

Hi,

I have encountered this error during the synthesis:

"TclStackFree: incorrect freePtr. Call out of sequence?"

I am using Vivado 2013.3 on Linux system.

 

I have already tried some solutions I have found in this forum:
http://forums.xilinx.com/t5/Synthesis/Unknown-Vivado-Synth-Error/td-p/387265/highlight/true

which the user downgraded the version of Vivado from 2013.3 to 2013.2, and
http://www.xilinx.com/support/answers/55687.htm

which suggests to type a specific tcl command before starting the synthesis.

 

The second solution didn't work and, instead downgrading my version to 2013.2, i have upgraded to 2013.4, but the error persists. 

I have to add that Vivado is trying to synthesize a system that will allocate much more than the available resource of Virtex 7. I have 5 different configurations of my system, all of them based on a different size of the problem. The first 4 configurations worked well with the synthesis, everytime allocating ten times the resources the previous configuration allocated.
The 4th one, allocated 31% of slices for logic and 51% of slices for memory. Since the size of the 5th will require at least 10 times the resources used on the 4th configuration, i am sure the error depends for this reason, but, since the synthesis phase does not expect any placing, i expect the synthesis performs smoothly.

 

I have attached the log file with the part of the RTL verification erased.
What do you think? 

 

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23 Replies
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Xilinx Employee
Xilinx Employee
19,460 Views
Registered: ‎09-20-2012

Hi,

 

Can you try using "Flow Run time optimized" synthesis strategy?

 

Try setting "Flatten_hierarchy" to NONE in synthesis settings and see if that helps.

 

Regards,

Deepika.

Thanks,
Deepika.
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Highlighted
19,455 Views
Registered: ‎01-30-2014

Hi Vemulad, thanks for your reply. 
At the moment the error is still there, even applying your solution.

 

Antonio

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Xilinx Employee
Xilinx Employee
19,448 Views
Registered: ‎09-20-2012

Hi Antonio,

 

Did you try both the suggestions and still seeing the issue?

 

Is is possible to share the test case for debug?

 

Thanks,

Deepika.

Thanks,
Deepika.
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19,439 Views
Registered: ‎01-30-2014

At the moment my only test case is my general testbench which let my developed system entirely work

Antonio

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19,435 Views
Registered: ‎01-30-2014

At the moment i am using Vivado 2013.2 to try to synthesize, as suggested in the first link i shared. It doesn't seem to stop as soon as with 2013.3 and 2013.4. It is still working! 
But i think it is too early to say it's completely working. Since the 4th configuration took around 1h to be synthesized, this will take many hours. Hopefully, i hope i can tell you more tomorrow


Antonio

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19,434 Views
Registered: ‎01-30-2014

Too many hopes, sorry.
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19,428 Views
Registered: ‎01-30-2014

The synthesis with 2013.2, after few hours, terminated with the same error, but adding also the phrase

"3 unexpected non-zero reference counts".

 

Antonio

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Xilinx Employee
Xilinx Employee
19,425 Views
Registered: ‎09-20-2012

Hi,

 

1. Did you try setting "flatten_hierarchy" to NONE in 2013.2 or 2013.4?

 

2. Did you try using synthesis strategy "Run time optimized" in 2013.2 or 2013.4?

 

Thanks,

Deepika.

 

Thanks,
Deepika.
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19,423 Views
Registered: ‎01-30-2014

I have tried to you use the strategy "Run time optimized" and i saw that the script using this strategy already sets flatten_hierarchy to NONE. Still does not work with all the versions.

 

Antonio 

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Xilinx Employee
Xilinx Employee
14,344 Views
Registered: ‎10-24-2013

Hi,

Can you please share the testcase so that we can debug this at our end??
Thanks,Vijay
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Visitor
Visitor
13,622 Views
Registered: ‎10-25-2014

Hi

Did you solve the problem?I met the same problem。

 I am using Vivado 2014.3 with Window 7-64bit

 

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Participant
Participant
13,461 Views
Registered: ‎09-10-2012

I've faced same problem. Win7 x64, Vivado 2014.3 and 2014.4. Simplest project consists of one register. Flow_RuntimeOptimized strategy don't help.

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Participant
Participant
13,370 Views
Registered: ‎09-10-2012

After some tests, I've solved my problem. Error was caused by cyrillic letters in computer name.

Maybe it will help someone.

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Newbie
Newbie
12,515 Views
Registered: ‎05-05-2015

 It works, thank you very much!

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Xilinx Employee
Xilinx Employee
12,507 Views
Registered: ‎07-01-2010

@g.pavlikh

 

Thanks for posting your findings.

 

Is the issue with the computer name or the path name?

 

Can you give us the snippet so that we can try reproducing it and see it is fixed?

 

Regards,

Achutha

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Participant
Participant
12,505 Views
Registered: ‎09-10-2012

Problem was with the computer name, it was "User-ПК". After changing name to "User-PC" error has disappeared. Path to files is in english only.

2015.1 still have this issue.

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Highlighted
8,136 Views
Registered: ‎09-11-2014

Just got this error too with Vivado 2016.3. I was able to use Vivado 2015.3 with no problem.

 

2016.3 only started working when I moved it to a different folder. Perhaps the path was too long? Using Windows 7/64.

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Advisor
Advisor
7,329 Views
Registered: ‎02-12-2013

I am getting this same error message on a Kintex Ultrascale 040 design under Vivado 2016.4.

 

I applied the recommendation from AR# 55687 and that seems to fix the problem for now.

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DSP in hardware and software
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Moderator
Moderator
7,065 Views
Registered: ‎07-21-2014

@pedro_uno

 

This could be a different issue. Can you please share more details and log files for us to understand the root cause?

In such cases, we might need to look into the design in order to provide a suitable work around.

 

Thanks,
Anusheel
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Advisor
Advisor
5,210 Views
Registered: ‎02-12-2013

Anusheel,

 

I have lost the exact configuration that gave me this error message.  If I see it again I will try to capture it for you.

 

  Pete

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DSP in hardware and software
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Observer
Observer
4,856 Views
Registered: ‎12-12-2017

I am also facing similar problem on Vivado 2017.3.1.

I am using generate statement in my Verilog code.  The tool was able to synthesize up to for loop limit 15, when it exceeds the 15 it's throwing an error (TclStackFree: incorrect freePtr. Call out of sequence?).

I have tried your suggestions but still, it's not working.

 

What would be the problem?
  

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Contributor
Contributor
4,373 Views
Registered: ‎04-19-2017

Hi @anusheel and all,

 

I got the same issue on Vivado 2016.2. Attached is the log file.

 

If you need more detail info, please let me know!

 

Kind regards,

Khoa

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Moderator
Moderator
4,348 Views
Registered: ‎03-16-2017

Hi @khoa_pham,

 

Create a fresh new thread with your issue to get it noted by the community. 

 

Regards,

hemangd

Regards,
hemangd

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