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angeldecastro
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Registered: ‎02-17-2021

VHDL 2008 resize options, fixed_round_style and fixed_overflow_style, how to change the default values in Vivado 2020.2

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I have started to use fixed point in VHDL 2008 (sfixed in my case) with Vivado 2020.2. It's great that it supports it now, so I just have to declare the IEEE library:

library IEEE;

use IEEE.fixed_pkg.all;

However, I have an issue about the options about rounding and overflow. If I don't change the default options, it's ok. Something like this:

a <= resize(b,a); -- a and b are of different size / range

But the default options are round and saturate, which increase the necessary resources and time. I want to just truncate and wrap, so I have tried two options:

a <= resize(b,a,false,false); -- setting the optional parameters to false would mean truncate and wrap respectively

In this first case, I get the following errors:

[Synth 8-2778] type error near false; expected type fixed_overflow_style_type

[Synth 8-2778] type error near false; expected type fixed_round_style_type

Ok, so I guessed I should use the names used in VHDL 2008 library (which in fact are translated to false, but ok). So I changed to:

a <= resize(b,a,fixed_truncate,fixed_wrap); -- setting the optional parameters to truncate and wrap respectively

But then I get the following errors:

[Synth 8-1031] fixed_truncate is not declared

[Synth 8-1031] fixed_wrap is not declared

I also tried the reverse order (which I think is wrong, but just in case):

a <= resize(b,a,fixed_wrap,fixed_truncate); -- just reverse order of optional parameters

But then I get the same errors in the reverse order:

[Synth 8-1031] fixed_wrap is not declared

[Synth 8-1031] fixed_truncate is not declared

 

Any help about this? I want to use VHDL 2008 libraries, but I want to set the round and overflow style to the minimum resource usage. If it's possible to change the default directly, it would also work, at least for me. Thanks in advance.

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richardhead
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Registered: ‎08-01-2012

Fixed_truncate and fixed_wrap are not boolean values, they are explicit types declared in the fixed_float_types package. To use them, you need to add the package at the top of the file:

use ieee.fixed_float_types.all;

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richardhead
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Registered: ‎08-01-2012

Fixed_truncate and fixed_wrap are not boolean values, they are explicit types declared in the fixed_float_types package. To use them, you need to add the package at the top of the file:

use ieee.fixed_float_types.all;

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angeldecastro
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Registered: ‎02-17-2021

Thx Richard. It worked!

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angeldecastro
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Registered: ‎02-17-2021

By the way, although it's not an error, all lines in VHDL files related to fixed point or floating point are underlined in red in the Vivado editor (2020.2), as if they were errors or not supported. Now that they are supported, it seems a bit strange. But it's just a comment about visual aspect, not proper working.

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richardhead
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Registered: ‎08-01-2012

Vivado's relationship with VHDL 2008 is rather disjointed. Synthesis has the best support, with the editor being 2008 aware (though not fully, as you found) and the simulator being just terrible. Just use the synthesis results as the "truth"

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