12-07-2015 08:53 PM
I am doing a project in which i have to design a module which does the division operation. I have designed a module for division but for n bit width data its taking n clock cycle for division. Please suggest some algorithm which take minimum number of clock cycle in order to perform a division operation.
12-08-2015 01:11 AM
12-08-2015 01:43 AM
Just attaching it all end-to-end also tends to do horrible things to resource consumption.
What sort of numbers are you dividing? For small widths (eg. 8-bit divided by 4-bit) you can do the whole thing with a block RAM lookup table - so you can do two divisions per clock cycle. For larger values, there are fast division algorithms; these give much faster convergence but are also much more complex to implement (the single-bit-per-cycle method is very, very easy to implement).