12-14-2018 08:34 AM
I just installed the latest version of Vivado, 2018.3, on my computer. When I follow this tutorial and try to synthesize it, it seems to take forever and never completes. Before 2018.3, I had 2018.2 installed and when I try to synthesize it, It will say "Running synth_design" for about 5 min before failing and saying "synth design failed" with out any reason given. I've tried running it with different amount of jobs, from 1-12.
However, this all works on my laptop which has 2018.2 installed. The only thing that I think can be causing this is the different CPUs. My desktop is running an AMD Ryzen 2600x, while my Laptop is running an Intel i7 6700HQ. Could this be the issue? Any suggestions on getting synthesis to run on my desktop?
12-14-2018 10:25 AM
I ran the uninstaller, deleted the remaining Xilinx folder and restarted my computer. Reinstalled 2018.3 and it still has the same issue. Looking at task manager, it doesn't seem like Vivado is using any CPU resources.
12-14-2018 12:56 PM
12-15-2018 10:04 PM
Can you post your project directory path here? (For Vivado 2018.3)
Make sure there are no spaces in between letters of your project directory path.
12-16-2018 08:52 AM
There are no spaces in the path: D:\Users\Brendan\Documents\Embedded\extracredit\pwm_verilog\pwm_verilog.xpr
01-06-2019 11:05 PM
I can see that example project targets 2015.x version of Vivado. Can you please share your .bd or block design .tcl file for us to reproduce the issue(if there are no custom IPs)?