cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 
Highlighted
Visitor
Visitor
1,163 Views
Registered: ‎06-06-2019

Vivado 2018.3 synthesis crash

Jump to solution

Hi, Vivado 2018.3 seems to crash with the following Verilog code, which I have tried to reduce as much as possible.

module top  (y, clk, wire0);
   output y;
   input  clk;
   input [1:0] wire0;
   reg [1:0]   reg1 = 0, reg0 = 0, reg2 = 0, 
               reg3 = 0, reg4 = 0;
   reg signed [1:0] reg5 = 0;
   wire [1:0]       wire1;
   assign y = reg1;
   assign wire1 = reg4;
   always @(posedge clk)
     if (reg4)
       begin
          if (wire0)
            reg3 <= 1;
          reg2 <= 1;
       end
   always @(posedge clk)
     if (reg3) begin
        reg5 <= reg2[0:0];
        if (reg0)
          reg1 <= reg5;
        if (reg2[0:0])
          reg0 <= 1;
     end
endmodule  

It results in the error shown below.

****** Vivado v2018.3 (64-bit)
  **** SW Build 2405991 on Thu Dec  6 23:36:41 MST 2018
  **** IP Build 2404404 on Fri Dec  7 01:43:56 MST 2018
    ** Copyright 1986-2018 Xilinx, Inc. All Rights Reserved.

source vivado_top.tcl
# set_msg_config -id {Synth 8-5821} -new_severity {WARNING}
# read_verilog rtl.v
# synth_design -part xc7k70t -top top
Command: synth_design -part xc7k70t -top top
Starting synth_design
Attempting to get a license for feature 'Synthesis' and/or device 'xc7k70t'
INFO: [Common 17-349] Got license for feature 'Synthesis' and/or device 'xc7k70t'
INFO: Launching helper process for spawning children vivado processes
INFO: Helper process launched with PID 10415 
---------------------------------------------------------------------------------
Starting Synthesize : Time (s): cpu = 00:00:02 ; elapsed = 00:00:02 . Memory (MB): peak = 1349.855 ; gain = 0.000 ; free physical = 1545 ; free virtual = 5134
---------------------------------------------------------------------------------
INFO: [Synth 8-6157] synthesizing module 'top' [/home/user/project/rtl.v:1]
Abnormal program termination (11)
Please check '/home/user/project/hs_err_pid10402.log' for details

I have also attached a project with which it can be reproduced. unzipping it and running

vivado -mode batch -source vivado_top.tcl

should result in the same error.

The Verilog code seems to synthesise fine in other synthesiser without producing any warnings.

0 Kudos
1 Solution

Accepted Solutions
Highlighted
Xilinx Employee
Xilinx Employee
1,067 Views
Registered: ‎02-16-2014

Hi @ymherklotz 

 

I am able to reproduce this issue in latest version of Vivado 2019.1.

Debugging it further and will file a CR for this.

Hope you have workaround to move forward with the design.

 

Thanks,

Manusha

View solution in original post

0 Kudos
9 Replies
Highlighted
Contributor
Contributor
1,140 Views
Registered: ‎06-06-2019
I would say downgrade to a 2017.x and see if the issue is resolved. Based on: https://forums.xilinx.com/t5/Design-Entry/Unexpected-error-has-occured-11-Vivado-2018-2/td-p/870547 I think this will not be solved soon.
0 Kudos
Highlighted
Visitor
Visitor
1,133 Views
Registered: ‎06-06-2019

Thanks for the reply, I have tried running it with Vivado 2016.2 and 2017.4 and the same error occurs unfortunately. I don't have an older version of Vivado available to test with.

 

0 Kudos
Highlighted
Contributor
Contributor
1,123 Views
Registered: ‎06-06-2019
Which OS are you using? Is it updated? Maybe that is causing the problem.
Secondly, here some users suggested problems with the installed libraries: https://forums.xilinx.com/t5/Design-Entry/librdi-common-not-found-executing-vivado/td-p/536991

Your log also shows problems for librdi & libtcl.
0 Kudos
Highlighted
Visitor
Visitor
1,114 Views
Registered: ‎06-06-2019

Vivado runs flawlessly in most cases, it was just for this piece of Verilog that it failed. If anything is removed from the Verilog I posted above, it synthesises fine. Even when removing the wire1, which is not used at all, the Verilog synthesises.

With this Verilog code, Vivado has crashed on my personal Arch Linux machine, which I suspect is not officially supported, but also on a server running CentOS 6. In both cases, Vivado works perfectly fine except for that piece of code.

That post looked very promissing actually, but Vivado was still working fine for me on the server and my local machine for the synthesis of any other piece of Verilog.  `ldd vivado` also shows that it is pointing to the right libraries I believe.

The stack trace that I posted also points to a specific function

/opt/Xilinx/Vivado/2018.3/lib/lnx64.o/librdi_synth.so(HOptDfg::reconnectLoadPinToSource(DFPin*, DFPin*)+0x23b) [0x7f56ccb15d4b]

So I don't think it is has a problem finding the libraries as in the other forum post, but that it might be a problem with the synthesis?

$ ldd vivado                                                                                                                                                                                                             unwrapped/lnx64.o
        linux-vdso.so.1 (0x00007ffcbb9e0000)
        libtcmalloc.so.4 => /opt/Xilinx/Vivado/2018.3/lib/lnx64.o/libtcmalloc.so.4 (0x00007f30d9299000)
        libboost_signals.so => /opt/Xilinx/Vivado/2018.3/lib/lnx64.o/libboost_signals.so (0x00007f30d9083000)
        librdi_common.so => /opt/Xilinx/Vivado/2018.3/lib/lnx64.o/librdi_common.so (0x00007f30d80ca000)
        librdi_commonmain.so => /opt/Xilinx/Vivado/2018.3/lib/lnx64.o/librdi_commonmain.so (0x00007f30d7ebf000)
        libstdc++.so.6 => /usr/lib/libstdc++.so.6 (0x00007f30d7ce7000)
        libgcc_s.so.1 => /usr/lib/libgcc_s.so.1 (0x00007f30d7ccd000)
        libc.so.6 => /usr/lib/libc.so.6 (0x00007f30d7b06000)
        libpthread.so.0 => /usr/lib/libpthread.so.0 (0x00007f30d7ae5000)
        libm.so.6 => /usr/lib/libm.so.6 (0x00007f30d799f000)
        libCOIN-all.so => /opt/Xilinx/Vivado/2018.3/lib/lnx64.o/libCOIN-all.so (0x00007f30d71b2000)
        libXil_lmgr11.so => /opt/Xilinx/Vivado/2018.3/lib/lnx64.o/libXil_lmgr11.so (0x00007f30d6cdb000)
        libboost_date_time.so => /opt/Xilinx/Vivado/2018.3/lib/lnx64.o/libboost_date_time.so (0x00007f30d6aca000)
        libboost_filesystem.so => /opt/Xilinx/Vivado/2018.3/lib/lnx64.o/libboost_filesystem.so (0x00007f30d68b3000)
        libboost_program_options.so => /opt/Xilinx/Vivado/2018.3/lib/lnx64.o/libboost_program_options.so (0x00007f30d663e000)
        libboost_regex.so => /opt/Xilinx/Vivado/2018.3/lib/lnx64.o/libboost_regex.so (0x00007f30d635b000)
        libboost_system.so => /opt/Xilinx/Vivado/2018.3/lib/lnx64.o/libboost_system.so (0x00007f30d6158000)
        libboost_thread.so => /opt/Xilinx/Vivado/2018.3/lib/lnx64.o/libboost_thread.so (0x00007f30d5f34000)
        libboost_xilinx.so => /opt/Xilinx/Vivado/2018.3/lib/lnx64.o/libboost_xilinx.so (0x00007f30d5d2d000)
        libhdlpsolve.so => /opt/Xilinx/Vivado/2018.3/lib/lnx64.o/libhdlpsolve.so (0x00007f30d5a89000)
        libhdxml.so => /opt/Xilinx/Vivado/2018.3/lib/lnx64.o/libhdxml.so (0x00007f30d57d7000)
        libisl_iostreams.so => /opt/Xilinx/Vivado/2018.3/lib/lnx64.o/libisl_iostreams.so (0x00007f30d493b000)
        libisl_sysinfo.so => /opt/Xilinx/Vivado/2018.3/lib/lnx64.o/libisl_sysinfo.so (0x00007f30d4706000)
        liblmx6.0.so => /opt/Xilinx/Vivado/2018.3/lib/lnx64.o/liblmx6.0.so (0x00007f30d4498000)
        libprotobuf.so.13 => /opt/Xilinx/Vivado/2018.3/lib/lnx64.o/libprotobuf.so.13 (0x00007f30d403b000)
        librdi_commonxillic.so => /opt/Xilinx/Vivado/2018.3/lib/lnx64.o/librdi_commonxillic.so (0x00007f30d3b41000)
        librdiconfig.so => /opt/Xilinx/Vivado/2018.3/lib/lnx64.o/librdiconfig.so (0x00007f30d392a000)
        librdizlib.so => /opt/Xilinx/Vivado/2018.3/lib/lnx64.o/librdizlib.so (0x00007f30d3705000)
        libtcl8.5.so => /opt/Xilinx/Vivado/2018.3/lib/lnx64.o/libtcl8.5.so (0x00007f30d33e2000)
        libxerces-c-3.1.so => /opt/Xilinx/Vivado/2018.3/lib/lnx64.o/libxerces-c-3.1.so (0x00007f30d2e26000)
        libdl.so.2 => /usr/lib/libdl.so.2 (0x00007f30d2e1f000)
        libgurobi65.so => /opt/Xilinx/Vivado/2018.3/lib/lnx64.o/libgurobi65.so (0x00007f30d1d7e000)
        libgomp.so.1 => /usr/lib/libgomp.so.1 (0x00007f30d1d4e000)
        /lib64/ld-linux-x86-64.so.2 => /usr/lib64/ld-linux-x86-64.so.2 (0x00007f30d9510000)
        librdi_commonversion.so => /opt/Xilinx/Vivado/2018.3/lib/lnx64.o/librdi_commonversion.so (0x00007f30d1b4b000)
        librt.so.1 => /usr/lib/librt.so.1 (0x00007f30d1b41000)
        libboost_iostreams.so => /opt/Xilinx/Vivado/2018.3/lib/lnx64.o/libboost_iostreams.so (0x00007f30d192c000)
        libisl_iosutils.so => /opt/Xilinx/Vivado/2018.3/lib/lnx64.o/libisl_iosutils.so (0x00007f30d1713000)
0 Kudos
Highlighted
Contributor
Contributor
1,104 Views
Registered: ‎06-06-2019
After reading a number of posts, I think this is a bug in vivado. Based on your response, you can still run your code by making a small change and keeping the same functionality. Maybe this gets resolved in the next few months.
Highlighted
Visitor
Visitor
1,097 Views
Registered: ‎06-06-2019

Ah ok, thanks for your help, at least I know it's not a problem with the installation.

0 Kudos
Highlighted
Xilinx Employee
Xilinx Employee
1,068 Views
Registered: ‎02-16-2014

Hi @ymherklotz 

 

I am able to reproduce this issue in latest version of Vivado 2019.1.

Debugging it further and will file a CR for this.

Hope you have workaround to move forward with the design.

 

Thanks,

Manusha

View solution in original post

0 Kudos
Highlighted
Visitor
Visitor
1,040 Views
Registered: ‎06-06-2019

Thank you for confirming!

 

All the best,

Yann

0 Kudos
Highlighted
Xilinx Employee
Xilinx Employee
1,012 Views
Registered: ‎02-16-2014

Hi Yann,

 

Filed CR for this issue.

 

Thanks,

Manusha

0 Kudos