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Observer
Observer
382 Views
Registered: ‎05-01-2019

Vivado

Hi, 

I created my design in Vivado 2017.4 Version and now I want to transfer it to 2018.3 version, while synthesis I got an error stating " [Synth 8-3493] module does not have matching formal port for component port. " 

Could you please tell why does this error come although my design was perfectly working in the 2017.8 version. 

 

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2 Replies
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Observer
Observer
365 Views
Registered: ‎06-19-2019

Xilinx sometimes change the behavior (and porting) of the IP's.
so when u upgraded the IP's then it might be that there major changes between the IP's and u need to generate them from scratch.
btw, there is a way of using old IP's in new Vivado.
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Xilinx Employee
Xilinx Employee
340 Views
Registered: ‎05-14-2008

If the module mentioned is not from a Xilinx IP, you need to check if the port mapping in the module instantiation matches the component declaration.

-vivian

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