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Visitor varenyam
Visitor
9,574 Views
Registered: ‎10-11-2014

WARNING:Xst:1293 - FF/Latch <n_reg_1> has a constant value of 0 in block <uart_tx_unit>. This FF/Latch will be trimmed during the optimization process.

localparam [1:0]
idle = 2'b00,
start = 2'b01,
data = 2'b10,
stop = 2'b11;
// signal declaration
reg [1:0] state_reg,state_next;
reg [3:0] s_reg,s_next;
reg [2:0] n_reg,n_next;
reg [7:0] b_reg,b_next;
reg tx_reg,tx_next;
 
always @(posedge clk, posedge reset)
if(reset)
begin
state_reg <= idle;
s_reg <= 0;
n_reg <= 0;
b_reg <= 0;
tx_reg <= 1'b1;
end
else
begin
state_reg <= state_next;
s_reg <= s_next;
n_reg <= n_next;
b_reg <= b_next;
tx_reg <= tx_next;
end
initial
begin
n_reg=3'b000;
n_next=3'b000;
end

always @*
begin
state_next = state_reg;
tx_done_tick = 1'b0;
s_next = s_reg;
n_next = n_reg;
b_next = b_reg;
tx_next = tx_reg;
case(state_reg)
idle:
begin
tx_next = 1'b1;
if(tx_start)
begin
state_next = start;
s_next = 0;
b_next = din;
end
end
start:
begin
tx_next = 1'b0;
if(s_tick)
if(s_reg==15)
begin
state_next = data;
s_next = 0;
n_next = 0;
end
else
s_next = s_reg + 1'b1;
end
data&colon;
begin
tx_next = b_reg[0];
if(s_tick)
if(s_reg==15)
begin
s_next = 0;
b_next = b_reg >> 1 ;
if(n_reg==(DBIT-1))
state_next = stop;
else
n_next = n_reg + 1'b1;
end
else
s_next = s_reg + 1'b1;
end
stop:
begin
tx_next = 1'b1;
if(s_tick)
if(s_reg==(SB_TICK-1))
begin
state_next = idle;
tx_done_tick = 1'b1;
end
else
s_next = s_reg + 1'b1;
end
endcase
end
//output
assign tx = tx_reg;
endmodule

 

 

 

 

 

 

how can i remove warnings????

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5 Replies
Xilinx Employee
Xilinx Employee
9,491 Views
Registered: ‎10-24-2013

Re: WARNING:Xst:1293 - FF/Latch <n_reg_1> has a constant value of 0 in block <uart_tx_unit>. This FF/Latch will be trimmed during the optimization process.

Hi,

Please check this AR.

http://www.xilinx.com/support/answers/18397.html

Thanks,Vijay
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Historian
Historian
9,475 Views
Registered: ‎02-25-2008

Re: WARNING:Xst:1293 - FF/Latch <n_reg_1> has a constant value of 0 in block <uart_tx_unit>. This FF/Latch will be trimmed during the optimization process.

Answered here.

----------------------------Yes, I do this for a living.
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Visitor itsna
Visitor
3,890 Views
Registered: ‎08-18-2016

Re: WARNING:Xst:1293 - FF/Latch <n_reg_1> has a constant value of 0 in block <uart_tx_unit>. This FF/Latch will be trimmed during the optimization process.

@varenyam, have you solved the problem? I have the exact same problem and I still can't get it to work, the block is removed and many signals are not connected even though I have connected those signals in the code, and when I program the FPGA, the transmitter didn't work
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Moderator
Moderator
3,880 Views
Registered: ‎06-24-2015

Re: WARNING:Xst:1293 - FF/Latch <n_reg_1> has a constant value of 0 in block <uart_tx_unit>. This FF/Latch will be trimmed during the optimization process.

@itsna,

 

Did you try the suggestions provided here: https://forums.xilinx.com/t5/Synthesis/Meaning-of-WARNING-Xst-1898-Due-to-constant-pushing/td-p/336971

Thanks,
Nupur
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Moderator
Moderator
3,863 Views
Registered: ‎07-21-2014

Re: WARNING:Xst:1293 - FF/Latch <n_reg_1> has a constant value of 0 in block <uart_tx_unit>. This FF/Latch will be trimmed during the optimization process.

@itsna

 

You need to check the design connectivity to make sure warnings are valid or not. First step would be to start from the RTL view and then compare the connections in the generated netlist. 

However, you can preserve cells and nets whenever required, but I would recommend to first analyze the design instead of using attributes.

 

Thanks,
Anusheel
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