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Observer sanjaac
Observer
7,457 Views
Registered: ‎03-16-2009

XST - configuration - VHDL

Dear all,

 

In my current project I have an entity for which I which arhitecture to use on a VHDL file where I instantiate the entity, like following configuration code:

-- Embedded configuration
-- Select control architecture to use
for all : Ctrl2D use entity work.Ctrl2D(rtl_small);

Within the VHDL file where Ctrl2D is defined, I have different configurations, namely rtl_tiny and rtl_small. Within each of those, are processes which have variables whose length depend on some constants (KA, KB), like:

process_out : process (in_a, in_b)   
    variable var : std_logic_vector (KA-KB-1 downto 0)  := (others => '0');   
  begin 

I should select which architecture to use in the configuration (rtl_tiny or rtl_small) depending on a given a given set of values KA and KB. For a set of values KA and KB that works fine with rtl_small and having rtl_small selected in the configuration, XST, when parsing, gives me warnign and error messages:

Entity <Ctrl2D> compiled.
WARNING:HDLParsers:3350 - "D:/Projects/Ctrl2D.vhd" Line 157. Null range: -33 downto 0
ERROR:HDLParsers:804 - "D:/Projects/Ctrl2D.vhd" Line 214. Size of concat operation is different than size of the target.
Entity <Ctrl2D> (Architecture <rtl_small>) compiled.

But those lines (157 and 214) are within the architecture rtl_tiny, not rtl_small.

I was confident that by selecting the right architecture in the configuration I was completely bypassing everything related to non-desired architectures, but it seems like I was wrong.

How can I direct XST to ignore the code of the non-interesting architectures, and parse and synthesize only the one that I selected in the configuration?

Thanks a lot in advance,

JaaC

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4 Replies
Xilinx Employee
Xilinx Employee
7,446 Views
Registered: ‎08-08-2007

Re: XST - configuration - VHDL

Hi JaaC,

 

XST supports configurations during the declaration of the component and not through the configuration block:

 

for <instantation_list> : <component_name> use <LibraryName>.<EntityName(<ArchName>);

 

or, in a slightly more readable format:

 

for all : NAND2 use entity work.NAND2(ARCHI);

 

- reference page 380 of the XST User Guide 12.3 version.

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Observer sanjaac
Observer
7,439 Views
Registered: ‎03-16-2009

Re: XST - configuration - VHDL

Dear elzinga,

 

Thanks for your reply. I had already read that info from XST UG, and did not help at all. My code is already in the declarative part of the architecture, see:

 

architecture struct of Stack2D is

  -- Interconnection signals
  signal dat_2ext : buf2dwrd;
  signal rd_2ext  : std_logic;  

  -- Interconnection signals
  signal dat_2slv : buf2dwrd;
  signal wr_2slv  : std_logic;  
 
  -- Embedded configuration
  -- Select control architecture to use
  for all : Ctrl2D use entity work.Ctrl2D(rtl_small);        

begin  

 

What was not metioned is that pragmas had to be added, like this:

 

-- pragma synthesis on
  for all : Ctrl2D use entity work.Ctrl2D(rtl_small);        
  -- pragma synthesis off

 

Now everything works flawlessly.

 

Kind regards,

 

JaaC

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Xilinx Employee
Xilinx Employee
7,426 Views
Registered: ‎08-08-2007

Re: XST - configuration - VHDL

Hmm, something else is happening becasue the statement:

 

-- pragma synthesis on

 

Only tells the tool (XST in this case) to start treating the following code as synthesizable.  Generally, the pragmas are written as:

 

-- pragma synthesis off

.... code not synthesized

-- pragma synthesis on

 

This is so you can call in code that is meant only for simulation.  In the code snippet that you have provided, you are telling the tool to stop syntheiszing after your:

 

-- pragma synthesis off

 

However, the format of your pragmas I believe is a remnant of XST and the documented way to turn of and on the synthesis tool is to us the following:

 

-- synthesis translate_off

.... code not synthesized

-- synthesis translate_on

 

I suspect that there is something else going on with your code.

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Observer sanjaac
Observer
7,366 Views
Registered: ‎03-16-2009

Re: XST - configuration - VHDL

Hi,

 

I had not written the _ (underscore) correctly, the code I have is:

 

-- pragma synthesis_off
for all : Ctrl2D use entity work.Ctrl2D(bighalf);

-- pragma synthesis_on

 

And this, mixed with having each different architecture for the same entity in a different file, and including only the required architecture file, seems to work.

 

My concern now is that I will need to include different architectures, something in the lines of:

 

for Inst_0 : Ctrl2D use entity work.Ctrl2D(bighalf);

for Inst_1 : Ctrl2D use entity work.Ctrl2D(bigfull);

 

and so on.. I'll give it a try, and see what happens. If someone can ahead of time point to some correct way of doing this that I am overlooking, I would be very grateful.

 

Regards,

 

JaaC

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