cancel
Showing results for 
Search instead for 
Did you mean: 
Highlighted
Participant
Participant
10,513 Views
Registered: ‎02-01-2008

divider operator an synthesis

hi to all,

i know that

XST supports Dividers only if:
• The divisor is constant and a power of 2.
• The description is implemented as a shifter.
• Both operands are constant.
XST exits with a specific error message in all other cases

 

But i notice that new versions os ISE sysnthesize the / operator with signed and unsigned data. i try to describe a simple divider in VHDL and synthesize and i notice that it pass all the implementation flow.

Is it normal?

 

0 Kudos
1 Reply
Highlighted
Xilinx Employee
Xilinx Employee
10,509 Views
Registered: ‎07-11-2011

Re: divider operator an synthesis

Hi,

 

It might have inferred divider IP/DSP48 blocks, check your synthesis report.

Not sue why do you think it is not normal.

 

 

Regards,

Vanitha.

---------------------------------------------------------------------------------------------
Please do google search before posting, you may find relavant information.
Mark the post - "Accept as solution" and give kudos if information provided is helpful and reply oriented
0 Kudos