Hello,everyone.
I have synthesised the cmult IP and added it to a verilog model. The process of synthesis is correct. But, when i simulated it in modelsim 6.3c, these error occured:
vsim work.one2two
# vsim work.one2two
# ** Note: (vsim-3812) Design is being optimized...
# ** Error: mult.v(85): Module 'CMPY_V2_1' is not defined.
# Optimization failed
# Error loading design
Did someone have this problem and solved it, please give me some help. Thank you!
