02-11-2019 02:22 AM
Hi all,
I am using Vivado 2018.3 and stumbling on the following info:
INFO: [Synth 8-5842] Cannot pack DSP OPMODE registers because of constant '1' value. Packing the registers will cause simulation mismatch at initial cycle.
Vivado synthesis detects my dsp operations correctly, however timing is not met because OPMODE register is not used. During initial cycle there is no operation and simulation mismatch is irrelevant.
My question: Vivado detects the situation correctly. Is there an option to tell Vivado Synthesis to ignore simulation mismatch and pack OPMODE register into DSP anyway?
Thanks and regards,
Sebastian
05-05-2019 11:55 PM
Hi Hemang,
the internal tcl switch you provided resolved this issue.
If anyone else needs this switch, please contact Xilinx.
Regards,
Sebastian
02-19-2019 12:18 PM
Which device you are targetting to? Also, did you try use_dsp attribute, I doubt this will help but please give a try.
Can you show us your code here?
Thanks
Anusheel
02-20-2019 01:12 AM
Hi anusheel,
thanks for your reply. I am using Artix 7 and Vivado 2018.3. Please find attached an example file and synthesis report. DSP functions (such as Z-Mux and AddSub) are detected correctly. Only the OPMODE register is placed outside in a separate FF for simulation accuracy reasons.
As you already assumed, the usp_dsp attribute does not help - this was my first thought as well.
Help is appreciated.
Thanks and regards,
Sebastian
03-18-2019 05:33 AM
Hi @sgeorgi_sen ,
I have filed a CR with the development and will keep you posted on the updates.
03-19-2019 12:53 AM
04-12-2019 10:31 PM
Hi @sgeorgi_sen ,
Sent you an emaill with a switch which will help to resolve your issue.
Plese try as suggested.
05-05-2019 11:55 PM
Hi Hemang,
the internal tcl switch you provided resolved this issue.
If anyone else needs this switch, please contact Xilinx.
Regards,
Sebastian
10-08-2019 11:14 PM - edited 10-08-2019 11:35 PM
I would also like to know the tcl command/switch that resolves this issue. @hemangd could you please email me (or post publicly) ?
Cheers
10-08-2019 11:54 PM
Sent you an email.
10-30-2019 02:03 PM
Hello hemangd,
I am also in need of this fix for packing the OPMODE registers. Can you provide it to me as well?
Thanks,
Stuart
11-03-2019 11:13 PM
Sent you an email.
01-21-2020 11:11 PM
Hello,
Can you please provide the fix to me
Regards,
Muhammad Hamza Muneer
01-22-2020 12:34 AM
Hi, @hamzamuneer ,
Please check your private message to get the switch.
04-10-2020 12:37 AM
Hello,
Can you provide it to me as well of this fix for packing the OPMODE registers.
I opened SR last year and they told they don't have a solution...
Thanks,
Noriaki
04-19-2020 04:51 AM
Sent you an email.
04-20-2020 06:42 PM
Hi hemangd,
Thank you for the info, and the switch worked perfectly.
Thanks,
Noriaki
06-11-2020 11:29 AM
Please could you also provide me with this fix for packing the OPMODE registers.
Many thanks, Paul.
06-12-2020 03:50 AM
Hi @hemangd,
just out of cuirosity: when is the number of customers reached, that it would make sense to publish the hidden switch here?
Regards,
Sebastian
10-06-2020 07:28 PM
Could someone please post the solution or send me?
Thank very much!
10-08-2020 08:14 AM
Please try the below parameter:
set_param synth.elaboration.rodinMoreOptions {rt::set_parameter dspPackCtrlRegAllowVdd true}