09-09-2019 05:32 AM
PhysDesignRules:367 - The signal <r_Rx_Serial0_IBUF> is incomplete. The
signal does not drive any load pins in the design.
iam using spartan 3e fpga in xilinx ise when i try to implement uart communication i would have taken uartrx and uarttx module those two i inluded in one main module but when try to pass the inputs to the uartrx iam gettin the above warning ..
09-11-2019 02:41 AM
At which process did you get this error?
If it is in Implementation, you can open the post-synthesis design in ISE with "Technology Schematic" or in Planahead and check if the signal mentioned in the error message drives any load. If it does drive nothing, check your code to see if there is any mistake that leads to incorrect connection.
09-11-2019 03:37 AM
09-11-2019 03:56 AM
Can you check the post-synthesis schematic in ISE "Technology Schematic" or in Planahead?
09-11-2019 05:14 AM
09-11-2019 08:05 PM
Can you post the screenshot of the schematic and the related code snippet?