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wesleytaylor
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Registered: ‎04-25-2014

"[Common 17-55] 'get_property' expects at least one object" Synthesized Design Critical Error

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Hello all,

 

Background Description.

Using Vivado 2014.2
Created a XILINX ip FIFO. It has the fifo implementation "Independent Clock Block RAM" selected.

Attempting to synthesize & getting critical error.

Description of error

[Common 17-55] 'get_property' expects at least one object [xdc file]

 

Description of xdc file

It has tcl commands (can't paste since code is stored on a seperate secure machine so I'll type)

 

set wr_clock [get_clock -of_object [get_ports wr_clk]
set rd_clock [get_clock -of_object [get_ports rd_clk]

set_max_delay -from [get_cells inst_fifo_gen...blahblah/rd_pntr_gc_reg[*]] -to [get_cells inst_fifo_gen...blahblah/Q_reg_reg[*]] -datapath_only [get_property -min PERIOD $rd_clock]

set_max_delay -from [get_cells inst_fifo_gen...blahblah/wr_pntr_gc_reg[*]] -to [get_cells inst_fifo_gen...blahblah/Q_reg_reg[*]] -datapath_only [get_property -min PERIOD $wr_clock]

What I think is wrong

The get_property period from the $wr_clock is not working...why? I do not know

Additional Information

The component is instantiated with wr_clock => clock & rd_clock => clock. Therefore the clocks aren't "independent"
This is based of legacy design. I assume the chap before me didn't have these errors & had a rational reason for declaring the component as such.

 

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muravin
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Registered: ‎11-21-2013

Wesley,

 

The problem is that when you use -of_object, you need to specify some search pattern or object type etc for that object.

 

If you use get_ports, this is invalid settings. If this XDC has been generated along with the FIFO, just get rid of it, the FIFO I assume is used somewhere in the design and the corresponding high-level clock constraint will cover that.

 

To avoid the error, one might write:

 

set wr_clock [get_ports wr_clk]

set rd_clock [get_ports rd_clk]

 

BR

Vlad

Vladislav Muravin

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muravin
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Registered: ‎11-21-2013

Wesley,

 

The problem is that when you use -of_object, you need to specify some search pattern or object type etc for that object.

 

If you use get_ports, this is invalid settings. If this XDC has been generated along with the FIFO, just get rid of it, the FIFO I assume is used somewhere in the design and the corresponding high-level clock constraint will cover that.

 

To avoid the error, one might write:

 

set wr_clock [get_ports wr_clk]

set rd_clock [get_ports rd_clk]

 

BR

Vlad

Vladislav Muravin

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wesleytaylor
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Registered: ‎04-25-2014
It was generated with FIFO, & therefore has been removed.
Thanks for reply
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muravin
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Registered: ‎11-21-2013

Were these files were generated the way you pasted them together and you did not modify them? If yes, there is indeed a constraint syntax issue.

Vladislav Muravin
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teddy200
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Registered: ‎03-18-2015

I get the same error using Vivado 2014.4

 

Will Xilinx release some sort of bugfix regarding this very annoying issue?

 

/Teddy

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avrumw
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Registered: ‎01-23-2009

Generally, this message occurs when the clocks used to drive the FIFO are not properly constrained.

 

The FIFO's XDC is attempting to get the period of the clock driving each of the two clock ports of the FIFO. This will only work if clocks have already been created upstream of the FIFO. These would be done either by using a core that constrains the clock (i.e. a clock wizard core, or a PCI core, etc...) or through a create_clock or create_generated_clock command in you user XDC file.

 

If none of these exist then the get_clocks -of_objects [get_ports...] returns a null list, and therefore you cannot get a property from it.

 

So, its not a Xilinx bug that needs to be fixed - the user needs to understand why the design that is using the FIFO has no clock associated with the clock ports of the FIFO.

 

Avrum

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Anonymous
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once I define a pin in XDC file, but forgot define it in top file, than it show this critical warnning!

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joancab
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Registered: ‎05-11-2015

"one might write.."

 

where?

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skitnado25
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Registered: ‎04-13-2018

I run into the same error but I had to add the board file repository file into my project setting under the IP tap. You can do the same for pmods to address errors like that.

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