UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

cancel
Showing results for 
Search instead for 
Did you mean: 
Highlighted
Explorer
Explorer
12,823 Views
Registered: ‎01-30-2011

truncate bits in std_logic_vector

sir , i want  to truncate 41 bits to 32 bits .for that i have used conv_integer function .

for example :

 

signal s : std_logic_vector (40 downto 0);

signal a : std_logic_vector (31 downto 0);

 signal i : integer

i <= conv_integer(s);

a <= conv_std_logic_vector (i,32);

 but it shows error :argument of 'conv_integer' must have sizn less than 32 .

 

then sir ,how do i truncate these bits ? please help

0 Kudos
5 Replies
Explorer
Explorer
12,819 Views
Registered: ‎07-24-2011

Re: truncate bits in std_logic_vector

The easiest way is:

 

a <= s(40 downto 9);

0 Kudos
Xilinx Employee
Xilinx Employee
12,813 Views
Registered: ‎08-17-2011

Re: truncate bits in std_logic_vector

Actually there is maybe not enough info to decide.

Wuher, you're assuming there's a binary point is between bit 9 and 8.. so that 8 downto 0 are fractional bits.. so you're correct.
However if s is an integer, when a <= s(40 downto 9) then a is now s/(2^9)....

if not then what about : a <= s(31 downto 0); -- simple truncation, discards all the top bits.

HTH
- Hervé

SIGNATURE:
* New Dedicated Vivado HLS forums* http://forums.xilinx.com/t5/High-Level-Synthesis-HLS/bd-p/hls
* Readme/Guidance* http://forums.xilinx.com/t5/New-Users-Forum/README-first-Help-for-new-users/td-p/219369

* Please mark the Answer as "Accept as solution" if information provided is helpful.
* Give Kudos to a post which you think is helpful and reply oriented.
0 Kudos
Teacher rcingham
Teacher
12,812 Views
Registered: ‎09-09-2010

Re: truncate bits in std_logic_vector

The probably correct function to use is RESIZE from the numeric_std package. However, this requires casting 's' to either unsigned or signed, and the OP has not given enough information to know which is more appropriate.


------------------------------------------
"If it don't work in simulation, it won't work on the board."
Observer strusc
Observer
12,790 Views
Registered: ‎11-17-2009

Re: truncate bits in std_logic_vector

I try to avoid integer conversions in synthesizable code since the tools sometimes do funny things with registers. I would propose 2 solutions.

 

As mentioned in the prior if you want to round off fractional bits you should do

 

a <= s(40 downto 9);

 

If you know that the upper bits are all zero you can throw them away but be careful for overflows

 

if (s(40 downto 32)= 0) then

      a <= s(31 downto 0);

      overflow <= '0';

else

      a <= (others=>'1')

      overflow <= '1';

end if;

 

 

The first can be done without a clocked process since its not a logical operation. The 2nd should be done in a clocked process since you are doing a compare.

 

Xilinx Employee
Xilinx Employee
12,778 Views
Registered: ‎11-28-2007

Re: truncate bits in std_logic_vector

When working with numbers, the first and most important thing to keep in mind is "is the number signed or unsigned?". The overflow detection code below works with unsigned numbers, but doesn't work with signed numbers. Hopefully technovlsi gets the idea and work out logic to detect overflow for signed representation if that's what is used in his system

 


@strusc wrote:

I try to avoid integer conversions in synthesizable code since the tools sometimes do funny things with registers. I would propose 2 solutions.

 

As mentioned in the prior if you want to round off fractional bits you should do

 

a <= s(40 downto 9);

 

If you know that the upper bits are all zero you can throw them away but be careful for overflows

 

if (s(40 downto 32)= 0) then

      a <= s(31 downto 0);

      overflow <= '0';

else

      a <= (others=>'1')

      overflow <= '1';

end if;

 

 

The first can be done without a clocked process since its not a logical operation. The 2nd should be done in a clocked process since you are doing a compare.

 




Cheers,
Jim
0 Kudos