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Newbie mneckoee
Newbie
10,551 Views
Registered: ‎02-12-2015

verilog property max_fanout deosn't applied

I have a 8192 row (13 bit address) and 12 bit width block ram. In virtex6 we have 36kb Block Rams. So ISE implement my ram into three 36kb BRAM with 4 bit width. For timing issues I want ISE to use individual flip-flops for each BRAM read(write) address So for read(write) address reg I set these properties:  
    1 - register duplication  
    2 - maximum fan-out  
but when I look at the implemented design in PLAN-AHEAD , these properties doesn't applied.  

my verilog code

what I imagine

what is implemented
what I want

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7 Replies
Moderator
Moderator
10,548 Views
Registered: ‎07-01-2015

Re: verilog property max_fanout deosn't applied

Hi @mneckoee,

 

Can you please check in synthesis settings for max-fanout?

 

Thanks,
Arpan

Thanks,
Arpan
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Newbie mneckoee
Newbie
10,541 Views
Registered: ‎02-12-2015

Re: verilog property max_fanout deosn't applied

Hi. I set that 80.

Capture.PNG

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Moderator
Moderator
10,536 Views
Registered: ‎07-01-2015

Re: verilog property max_fanout deosn't applied

Hi @mneckoee,

 

Can you please try the following:

  1. Setting max_fanout in XCF
  2. If you want to set max fanout globally then set -max_fanout=1 in synthesis settings

Thanks,
Arpan

Thanks,
Arpan
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Newbie mneckoee
Newbie
10,525 Views
Registered: ‎02-12-2015

Re: verilog property max_fanout deosn't applied

how can I edit XCF?

I want to only set the read address reg max_fanout to 1 not all of the design

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Moderator
Moderator
10,520 Views
Registered: ‎07-01-2015

Re: verilog property max_fanout deosn't applied

Hi @mneckoee,

 

Please add a .xcf file and add it to synthesis settings.

Please go through the attached snapshot.

 

Thanks,
Arpan

Thanks,
Arpan
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1.JPG
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Professor
Professor
10,490 Views
Registered: ‎08-14-2007

Re: verilog property max_fanout deosn't applied

Have you tried:

 

(* max_fanout = 1 *)

 

instead of

 

(* max_fanout = "1" *)

 

I think the latter actually evaluates to a string (ASCII character 1 = 0x31) which would set the fanout to 49 instead of 1.

-- Gabor
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Moderator
Moderator
10,245 Views
Registered: ‎07-21-2014

Re: verilog property max_fanout deosn't applied

@mneckoee

 

Do you see any details in synthesis log? Attribute must be detected and reported in the log. 

If the attribute was detected but the logic does not have replications then we need to check what part of the logic is blocking the replication, can share the test case for us to look into the design?

 

Thanks,
Anusheel
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