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Newbie karlikarli
Newbie
2,911 Views
Registered: ‎01-14-2019

vhdl Comparison operators with std_logic_vector

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Hi,

I read that relational operators don't support std_logic_vector , see https://forum.digilentinc.com/topic/494-vhdl-or-verilog/

However, although i declared only the package std_logic_1164  in the header of the entity; the following statement compiled fine

Flag<='1' when A<B else '0'; when both A and B are of std_logic_vector

I checked the std_logic_1164 code online, it does not include a function <...so how come the above code is accepted?

 

Thank you

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Scholar richardhead
Scholar
2,861 Views
Registered: ‎08-01-2012

Re: vhdl Comparison operators with std_logic_vector

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< and > are defined for all types in the language natively, so they dont need to be defined in packages. But they probably dont work how you think. They do NOT compare numeric values. You need an arithmatic based package for that (preferably numeric_std), where < and > will be overloaded for numerical comparison.

For all enumerated types, it compares the position of the value. for example, std_ulogic is defined:

type std_ulogic is ( 'U', 'X', '0', '1', 'Z', 'W','L', 'H','-');

So for this, the following return true:

'1' > '0'

'H' > 'W'

'X' > 'U'

It gets more complicated when it comes to SLVs. If the lengths are different, it immediately returns false. Otherwise IIRC, it does a bitwise comparison (using the rules above) starting from 'left.

So, in conclusion, dont do it without using some numerical pkg (numeric_std preferably, but numeric_std_unsigned from VHDL 2008 is also acceptable)

4 Replies
Scholar drjohnsmith
Scholar
2,894 Views
Registered: ‎07-09-2009

Re: vhdl Comparison operators with std_logic_vector

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less than works for std logic vector,

https://www.nandland.com/vhdl/examples/example-relational-operators.html

just make certain that both are the same size and type.

But, before you do, just check what hardware you expect the code to produce as it might be slow.

generaly one tries not to use the < and > operators in any HDL for that reason
<== If this was helpful, please feel free to give Kudos, and close if it answers your question ==>
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Scholar richardhead
Scholar
2,862 Views
Registered: ‎08-01-2012

Re: vhdl Comparison operators with std_logic_vector

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< and > are defined for all types in the language natively, so they dont need to be defined in packages. But they probably dont work how you think. They do NOT compare numeric values. You need an arithmatic based package for that (preferably numeric_std), where < and > will be overloaded for numerical comparison.

For all enumerated types, it compares the position of the value. for example, std_ulogic is defined:

type std_ulogic is ( 'U', 'X', '0', '1', 'Z', 'W','L', 'H','-');

So for this, the following return true:

'1' > '0'

'H' > 'W'

'X' > 'U'

It gets more complicated when it comes to SLVs. If the lengths are different, it immediately returns false. Otherwise IIRC, it does a bitwise comparison (using the rules above) starting from 'left.

So, in conclusion, dont do it without using some numerical pkg (numeric_std preferably, but numeric_std_unsigned from VHDL 2008 is also acceptable)

Newbie karlikarli
Newbie
2,842 Views
Registered: ‎01-14-2019

Re: vhdl Comparison operators with std_logic_vector

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Thank you. Could you please send me the link to the native language document.

 

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Scholar richardhead
Scholar
2,838 Views
Registered: ‎08-01-2012

Re: vhdl Comparison operators with std_logic_vector

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https://ieeexplore.ieee.org/document/4772740

 

9.2.3 Relational operators

Relational operators include tests for equality, inequality, and ordering of operands. The operands of each relational operator shall be of the same type. The result type of each ordinary relational operator (=, /=, <, <=, >, and >=) is the predefined type BOOLEAN. The result type of each matching relational operator (?=, ?/=, ?<, ?<=, ?>, and ?>=) is the same as the type of the operands (for scalar operands) or the the element type of the operands (for array operands).

......

For scalar types, ordering is defined in terms of the relative values. For discrete array types, the relation < (less than) is defined such that the left operand is less than the right operand if and only if the left operand is a null array and the right operand is a non-null array. Otherwise, both operands are non-null arrays, and one of the following conditions is satisfied: a) The leftmost element of the left operand is less than that of the right, or b) The leftmost element of the left operand is equal to that of the right, and the tail of the left operand is less than that of the right (the tail consists of the remaining elements to the right of the leftmost element and can be null).

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