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Explorer
Explorer
2,305 Views
Registered: ‎04-12-2012

Automatic "create_clock"

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Hello, 

 

Suppose that my design has an input named some_clock that's connected to an MMCA.

Will the XDC file of the MMCA (automatically created by Vivado) have a "create_clock" command for some_clock ?

 

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Accepted Solutions
3,204 Views
Registered: ‎01-22-2015

Re: Automatic "create_clock"

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@shaikon

The tools have "effectively" created the create_generated_clock constraint.   However, you will not find it in the main XDC file for your project.  You may want to read comments from avrumw in <this post>

 

 

11 Replies
Moderator
Moderator
2,295 Views
Registered: ‎09-15-2016

Re: Automatic "create_clock"

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@shaikon

 

I believe MMCA is a typo, you meant MMCM . Yes, MMCM will have create_clock command for its input port. And this input port will be connected to your some_clock port (through instantiation). So you need not to put separate create_clock constraint for the some_clock port in the top xdc. In case you wish to modify your input frequency, you go do it in the MMCM wizard.

 

Regards

Rohit

Regards
Rohit
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Moderator
Moderator
2,287 Views
Registered: ‎01-16-2013

Re: Automatic "create_clock"

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 @shaikon,

 

It will have create_clock (period) constraint on the clk_in1 port of MMCM.

create_clock -period 10.000 [get_ports clk_in1]

 

--Syed

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Did you check our new quick reference timing closure guide (UG1292)?
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Explorer
Explorer
2,270 Views
Registered: ‎04-12-2012

Re: Automatic "create_clock"

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Thanks,

Indeed this is what I see - so far so good.

 

But what about create_generated_clock for the MMCM output ?

I expected this to also be automatically generated by the tool. Yet the tool shows the number 0 under create generated clock.

 

What am I missing ?

 

 

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Moderator
Moderator
2,243 Views
Registered: ‎09-15-2016

Re: Automatic "create_clock"

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Hi @shaikon

 

Yes,  the clock from MMCM is auto generated. Did you try report_clocks on the synthesized design?

It should report the generated clock as shown below:

create_generera.JPG

 

Have you correctly instantiated the MMCM instantiation in your top level?

 

Regards

Rohit

Regards
Rohit
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Explorer
Explorer
2,238 Views
Registered: ‎04-12-2012

Re: Automatic "create_clock"

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I used the "report_clocks" command and indeed it shows the created clock...

 

However, 

The when I explore the XDC editor it isn't shows.

Is this a bug ?

123.PNG
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3,205 Views
Registered: ‎01-22-2015

Re: Automatic "create_clock"

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@shaikon

The tools have "effectively" created the create_generated_clock constraint.   However, you will not find it in the main XDC file for your project.  You may want to read comments from avrumw in <this post>

 

 

Explorer
Explorer
2,220 Views
Registered: ‎04-12-2012

Re: Automatic "create_clock"

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"However, you will not find it in the main XDC file for your project."

 

I see.

Is there any internal Vivado file where the create_generated_clock command is applied ?

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2,209 Views
Registered: ‎01-22-2015

Re: Automatic "create_clock"

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@shaikon

In the post I mentioned, you will see that I wrote a create_generated_clock constraint for the MMCM and put it in the main XDC file.  This resulted in a critical warning [Constraints 18-1056] (which is shown in the post).  This warning gives some good information.  For example, it says that I am attempting to "override" another "[unsaved constraint]" constraint - and then shows the "[unsaved constraint]".  

 

So, I think the answer to your question is that you won't find the automatically generated create_generated_clock constraint in any of the project files.  However, by forcing the critical warning (as I did), you can see this automatically generated constraint.

Moderator
Moderator
2,203 Views
Registered: ‎09-15-2016

Re: Automatic "create_clock"

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Hi @shaikon

 

>>Is there any internal Vivado file where the create_generated_clock command is applied ?

The generated clock will be applied to design's logical paths automatically. The tool will auto derived it but this won't get saved in any internal file as you asked.

 

Regards

Rohit

Regards
Rohit
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Explorer
Explorer
1,162 Views
Registered: ‎04-12-2012

Re: Automatic "create_clock"

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It's only my opinion - but having a constraint applied without any record is sub - optimal behavior to say the least (if not a bug).

Somewhat like seeing a charge on your bank account without ever being able to trace the receipt - because it was never issued...don't like it.

 

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Historian
Historian
1,157 Views
Registered: ‎01-23-2009

Re: Automatic "create_clock"

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It's only my opinion - but having a constraint applied without any record is sub - optimal behavior to say the least (if not a bug).

Somewhat like seeing a charge on your bank account without ever being able to trace the receipt - because it was never issued...don't like it.

 

I understand your point, but it is not really the same thing.

 

First, realize that the "create_clock" added by the clock wizard is a function of the wizard - it is just "helping you out" by creating an XDC file with the constraint in it because it knows what needs to be known to create this constraint. And it works out because many IP need constraints, so there is a mechanism of associating XDCs with IPs (it is central to the Xilinx IP strategy).

 

However, the clock wizard is is only one of many ways of constraining a design that contains an MMCM. MMCMs can be (and even often are) directly instantiated - they are primitive cells in the library, and hence can be instantiated.

 

The "automatically generated clock" that is the output of the MMCM is not created by a constraint - ever. It is a ramification of a clock modifying block existing in the design. Whenever a clock (created in any number of mechanisms - a primary clock from an IP's XDC, a primary clock from a users XDC, a generated clock from some other source) encounters an clock modifying cell (MMCM, PLL, BUFR and in UltraScale/UltraScale_ BUFGCE_DIV and GTx) - again brought in through any means (directly instantiated, or through an IP block), this clock modifying block creates new clocks. These clocks are based solely on the properties of the incoming clock and the programming of the clock modifying cell. While these new clocks show up in the clock database as "generated clocks" they are not created by a "create_generated_clock" command.

 

While I supposed it theoretically could be done another way (using an XDC file for the clock modifying block), that would be a bit weird. While there are mechanisms for user XDC files and for IP XDC files, there is no mechanism for a "primitive cell XDC file" and the MMCM/PLL/BUFG are all primitive cells. So a whole new constraint mechanism would need to be designed to bring in these "primitive cell XDC files" in both project and non-project mode - this would be the only place that XDC files get added to the project/design based solely on the instantiation of a cell...

 

What Xilinx has done here is far cleaner than what I describe above...

 

Avrum