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Contributor
Contributor
388 Views
Registered: ‎06-12-2018

CDC-13 in Vivado

Hi,

We are using independent clock built-in FIFOs for data transfer between two clock domains.

(62.5 MHz and 100 MHz clocks)

These clocks are generated from different MMCMs (with different input clocks also).

So in order to make safe CDC design we decided to use builtin FIFOs with independent clocks. As written in the datasheet of FIFOs, built-in FIFOs handles CDC issues for both data and reset signals as we give the write and read clock frequencies properly while configuring FIFOs from FIFO Generator.

After implementation we are getting "CDC-13 : 1 bit CDC path on a non-FD primitive" warning

for the FIFO reset signals. Is this warning meaningful or can we ignore this warning?

The detailed of warning is below:

Critical
CDC-13
1-bit CDC path on a non-FD primitive
Unsafe

Source(from):

XXX_fifo_inst/U0/inst_fifo_gen/gconvfifo.rf/gbi.bi/g7ser_birst.rstbt/rsync.ric.power_on_wr_rst_reg[0]/C

Destination(to):

XXX_fifo_inst/U0/inst_fifo_gen/gconvfifo.rf/gbi.bi/v7_bi_fifo.fblk/gextw[1].gnll_fifo.inst_extd/gonep.inst_prim/gf36e1_inst.sngfifo36e1/RST

Any idea about this warning?

Mustafa

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2 Replies
Contributor
Contributor
366 Views
Registered: ‎06-12-2018

Re: CDC-13 in Vivado

I read some subjects about CDC and constraints and i have a second question about CDC issue.

As i use FIFO for transferring data between two clock domains i used 

set_clock_groups -asynchronous constraint for read and write clocks of FIFO.

As i read from the forum this constraint will override set_max_delay constraints of the FIFO and this is not recommended. I am thinking that if i use built-in FIFO for data transfer, built-in FIFO has not set_max_delay constraint and then set_clock_groups -asynchronous constraint will not be problem. Right?

At the same time set_clock_groups  -asynchronous constraint is an easy way to make these two clocks. 

( Off course, i am adding CDC synchronizers for all the paths )

At this point is the below solution is true for CDC?

**use independent clocks Built-in FIFO.

**set clock frequencies properly by configuring FIFO generator.

**set_clock_groups -asynchronous constraint for two independent clocks.

Any comments will be helpful.

 

Mustafa

 

 

 

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Contributor
Contributor
310 Views
Registered: ‎06-12-2018

Re: CDC-13 in Vivado

Any suggestions?

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