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Observer gmarchiori
Observer
7,637 Views
Registered: ‎09-27-2010

DCM timing constraints in a PR flow

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Hello,

 

I'm wondering how to constraint a design that's being implemented with planahead in a partial

reconfiguration flow.

 

My design has some PR partitions, each of which is clocked by a dedicated DCM.

When I implement the static part of the design, I set the DCM's frequency at 225 MHz.

Then, when I implement the PR partitions, if this frequency can be reached, that's all fine.

But suppose one design in a PR partition cannot reach this frequency: the "clean" way to correct

this would be to re-implement also the static part, modifying the DCM clock frequency for this

particular partition.

 

Since I don't want to re-implement the static part every time one partition has timing issues,

I already implemented the logic to change the DCM's frequency during runtime using the dynamic

reconfiguration port on the DCM's.

This way, I can load a partial bitstream and run it at the frequency that it can reach.

 

But my problem now is how to implement in planahead the PR partition at the correct frequency,

lower than the 225 MHz generated by the static part: since, when implementing a PR partition,

the DCM's frequency is automatically inherited from the static part, I found no way to set the

frequency I want.

 

Part of the difficulty I found in doing this is that, when I load the already implemented static part

in planahead and create a new run for the PR partition,the tool does not show me the whole

timing constraints that were used in the static part.

For example, in the .pcf file that's present in the promoted static part directory, I found the line:

TS_dcm0_cFXpb = PERIOD TIMEGRP "dcm0_cFXpb" TS_clock_generator_0_clock_generator_0_SIG_PLL1_CLKOUT0 * 1.8 HIGH 50%;

that's the derived-clock constraint, automatically generated by the tool, for one of the DCM's output.

But in planahead I don't find any reference to this constraint, and it gives me an error if I try to

"manually" reference it.

 

To summarize, is there a way to constraint a DCM output when implementing a PR partition,

overriding the previous settings that come from the static partition implementation?

 

Thanks!

Giacomo

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1 Solution

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Xilinx Employee
Xilinx Employee
9,251 Views
Registered: ‎08-10-2007

Re: DCM timing constraints in a PR flow

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Hi Giacomo,

 

If the outputs of the DCM are only used to clock logic in the reconfigurable modules then you could apply different PERIOD constraints on those output clocks in a RM UCF file and set the values differently for each RM in a reconfigurable partition.  Once you put a constraint on a DCM output the tools will no longer automatically generate constraints for the DCM outputs so you will have to manually constrain them all.

 

David

6 Replies
Xilinx Employee
Xilinx Employee
9,252 Views
Registered: ‎08-10-2007

Re: DCM timing constraints in a PR flow

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Hi Giacomo,

 

If the outputs of the DCM are only used to clock logic in the reconfigurable modules then you could apply different PERIOD constraints on those output clocks in a RM UCF file and set the values differently for each RM in a reconfigurable partition.  Once you put a constraint on a DCM output the tools will no longer automatically generate constraints for the DCM outputs so you will have to manually constrain them all.

 

David

Observer gmarchiori
Observer
7,591 Views
Registered: ‎09-27-2010

Re: DCM timing constraints in a PR flow

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Hi David,

 

thanks for your answer: I tried this solution and it works.

Also, I made sure that the PERIOD constraints are applied only to the specific implementation that requires them, and not propagated to successive (unrelated) implementation runs, by using read_ucf to read the UCF file containing the PERIOD constraints, and the remove_files command to remove them after the run is done.

 

Now, I have another related problem: since I'm implementing a planahead batch flow, without user intervention or GUI, I need to know, after having performed a run, if the implemented PR partition has timing errors.

I tried to use the report_timing command, but it reports only estimated interconnect delays, so the results are different vs. the real delays computed by TRACE.

I also tried to import the TRACE results on the run using the read_twx command, but then I'm not able to get any informations using tcl commands, because the report_timing command continues to use the estimated delays, not the real ones as read from the twx file.

 

Is there a way to perform timing analysis on the real delays without using the GUI?

 

Thanks,

Giacomo

 

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Xilinx Employee
Xilinx Employee
7,588 Views
Registered: ‎05-14-2008

Re: DCM timing constraints in a PR flow

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Hi,

 

Please use the TRACE command as described on page 185 of http://www.xilinx.com/support/documentation/sw_manuals/xilinx12_4/devref.pdf

 

E.g trce -v 10 design1.ncd group1.pcf -o output.twr

 

You would need to use the relevant assembled .ncd of the particular design with the corresponding .pcf

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Observer gmarchiori
Observer
7,581 Views
Registered: ‎09-27-2010

Re: DCM timing constraints in a PR flow

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Hi ajmir,

 

I already have the results from the TRACE tool execution, my problem is how to analyze these results in planahead by using tcl commands in a batch flow.

 

Maybe I should move this question to the planahead section, as probably this has more to do with planahead commands than timing analysis.

 

Regards,

Giacomo

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Xilinx Employee
Xilinx Employee
7,576 Views
Registered: ‎08-10-2007

Re: DCM timing constraints in a PR flow

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Hi Giacomo,

 

You should be able to view the results of TRCE in PlanAhead by importing the timing results from the TWX file.  You are using the correct read_twx command to import those timing results.  I'm not sure how you'd view them though if you aren't looking at the PlanAhead GUI.  The report_timing is always going to launch the PlanAhead timing estimation tools rather than give you results based on imported timing results.

 

Perhaps you need to parse the TWX file (or better yet the TWR file) to see if there are any timing errors.  Or the PAR report will tell you the same.

 

David

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Observer gmarchiori
Observer
7,570 Views
Registered: ‎09-27-2010

Re: DCM timing constraints in a PR flow

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Hi David,

 

I see, even if I find strange that there is no interaction between the TRACE timing engine and planahead (other than reading the twx files).

I hope in some future planahead release this will be fixed, to reach a complete flow integration in a single tool.

I think for now I will create a parsing script to get the timing errors from a twr file.

 

Thanks again for your answers.

 

Regards,

Giacomo

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