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Explorer
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Registered: ‎09-13-2011

FIFO_DUALCLOCK_MACRO (FIFO36E1) CDC-13

Hi,

I do a cdc_report on a design and get a critical warning (CDC-13) about reset on a FIFO36E1. The FIFO is instantiated using the FIFO_DUALCLOCK_MACRO so it's an asynchronous FIFO.

According to UG473 the FIFO36E1 in the EN_SYN = FALSE mode should have circuitry for synchronizing the RST reset to each clock domain and well there's only one reset pin.

So how can I get rid of the CDC-13 critical warning? It doesn't make sense.

Thank you in advance

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