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Explorer
Explorer
254 Views
Registered: ‎04-12-2012

Is it mandatory to explicitly "create_clock" when using a clock modifying block

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Hello,

I know that with Vivado it isn't necessary to explicitly use the "create_generated_clock" command when the generated clock is an output of a PLL/MMCM/etc...

But is it necessary to use "create_clock" for the input clock that's driving the clock modyfing block ?

 

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Highlighted
170 Views
Registered: ‎01-22-2015

Re: Is it mandatory to explicitly "create_clock" when using a clock modifying block

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@shaikon 

The clock input to a clock modifying block (CMB) must be defined as a clock.  Usually, the clock input to a CMB comes from an external source (eg. crystal-based, low-jitter oscillator), into an FPGA pin/port, and then directly to a CMB.  In this situation, a create_clock constraint must be placed on the FPGA pin/port - something like the following:

create_clock -period 10.000 [get_ports clk_in1_p]

If you are using the Clocking Wizard IP to setup the CMB, then the required create_clock constraint is automatically written for you and placed in a special IP constraints file.  For example, I used the Clocking Wizard to setup an MMCM called CLK_GEN and found the IP constraints file is called CLK_GEN.xdc.
IP_XDC_file.jpg

If you do not use the Clocking Wizard IP to setup a CMB, then you must manually type the create_clock constraint into your project XDC constraints file.

**EDIT** In the above example, the create_clock constraint is needed because the CMB input clock is a primary clock (ie. one that enters the design through a FPGA port).  It is possible to send a generated clock from the output of one CMB to the input of another CMB.  In this case, the clock input to the second CMB needs a create_generated_clock constraint (and not a create_clock constraint).  However, if the first CMB was setup using the Clocking Wizard then the required create_generated_clock constraint was automatically written for you.

BTW - it is odd that the Clocking Wizard IP places the needed create_clock constraint in the IP constraints file but does not place the needed create_generated_clock constraint(s) there too - and I wish it did.  Instead, the Wizard hides the create_generated_clock constraints - for reasons unclear to me.

Mark

4 Replies
Xilinx Employee
Xilinx Employee
218 Views
Registered: ‎05-22-2018

Re: Is it mandatory to explicitly "create_clock" when using a clock modifying block

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Hi @shaikon ,

Please check page no. 81 of below user guide link, for detailed information:

https://www.xilinx.com/support/documentation/sw_manuals/xilinx2018_3/ug903-vivado-using-constraints.pdf

Also, when a clock goes to a clock modifying block (MMCM, PLL, BUFR), the tools automatically create generated clocks for the outputs of that block based on the clock propagating to the input of the block, and the properties of the block.

So, if the input to the MMCM has a create_clock upstream of it (on the input port) then the tool will automatically create generated clocks on the outputs of the MMCM. These clocks are "effectively" created with a create_generated_clock command, but the command itself does not appear in any XDC file.

The only clock command needed in that scenario is the create_clock.

However, you can see the effect by doing a report_clocks command.

Also check this AR#:

https://www.xilinx.com/support/answers/62488.html

Thanks,

Raj

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Explorer
Explorer
207 Views
Registered: ‎04-12-2012

Re: Is it mandatory to explicitly "create_clock" when using a clock modifying block

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So, if the input to the MMCM has a create_clock upstream of it (on the input port) then the tool will automatically create generated clocks on the outputs of the MMCM. These clocks are "effectively" created with a create_generated_clock command, but the command itself does not appear in any XDC file.

Well yes...this is what I wrote.

The only clock command needed in that scenario is the create_clock.

But Is it absolutely necessary really needed ? 

In my project I forgot to use the "create_clock" command for the clocks that arrive at the FPGA's input pins. I compiled the design and when I used "report_clocks" - I nonetheless saw the base clocks (driving the MMCMs) appear in the list.

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Moderator
Moderator
198 Views
Registered: ‎05-31-2017

Re: Is it mandatory to explicitly "create_clock" when using a clock modifying block

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HI @shaikon ,

You need to define the clock by using the create_clock command at the input port that is connected to the MMCM input clock.

 

Highlighted
171 Views
Registered: ‎01-22-2015

Re: Is it mandatory to explicitly "create_clock" when using a clock modifying block

Jump to solution

@shaikon 

The clock input to a clock modifying block (CMB) must be defined as a clock.  Usually, the clock input to a CMB comes from an external source (eg. crystal-based, low-jitter oscillator), into an FPGA pin/port, and then directly to a CMB.  In this situation, a create_clock constraint must be placed on the FPGA pin/port - something like the following:

create_clock -period 10.000 [get_ports clk_in1_p]

If you are using the Clocking Wizard IP to setup the CMB, then the required create_clock constraint is automatically written for you and placed in a special IP constraints file.  For example, I used the Clocking Wizard to setup an MMCM called CLK_GEN and found the IP constraints file is called CLK_GEN.xdc.
IP_XDC_file.jpg

If you do not use the Clocking Wizard IP to setup a CMB, then you must manually type the create_clock constraint into your project XDC constraints file.

**EDIT** In the above example, the create_clock constraint is needed because the CMB input clock is a primary clock (ie. one that enters the design through a FPGA port).  It is possible to send a generated clock from the output of one CMB to the input of another CMB.  In this case, the clock input to the second CMB needs a create_generated_clock constraint (and not a create_clock constraint).  However, if the first CMB was setup using the Clocking Wizard then the required create_generated_clock constraint was automatically written for you.

BTW - it is odd that the Clocking Wizard IP places the needed create_clock constraint in the IP constraints file but does not place the needed create_generated_clock constraint(s) there too - and I wish it did.  Instead, the Wizard hides the create_generated_clock constraints - for reasons unclear to me.

Mark