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fresher
Adventurer
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8,573 Views
Registered: ‎05-27-2013

MIG3_6_1 QDRll+

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HI,

 

      I have doubt regarding the iodelay. I have used the QDRll+ memory controller of Vertex-6(HXT). The memory controller is  designedwiththe (iodelay,oserders,iserders). Thedelayoftheiodelaycanberemovedwhileoffsetout/inconstraint .

I need a help. 

  

 

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fresher
Adventurer
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14,904 Views
Registered: ‎05-27-2013

Hi all

 

               I have read the user guide of the xilinx mig. It is sloved . 

 

 

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fresher
Adventurer
Adventurer
14,905 Views
Registered: ‎05-27-2013

Hi all

 

               I have read the user guide of the xilinx mig. It is sloved . 

 

 

View solution in original post

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