MIG3_6_1 QDRll+

[fresher]

HI,

      I have doubt regarding the iodelay. I have used the QDRll+ memory controller of Vertex-6(HXT). The memory controller is  designedwiththe (iodelay,oserders,iserders). Thedelayoftheiodelaycanberemovedwhileoffsetout/inconstraint .

I need a help. 

[fresher · Accepted solution]

Hi all

               I have read the user guide of the xilinx mig. It is sloved .