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Registered: ‎08-22-2014

SCOPED_TO_REF Critical Warnings

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Hi,

I am using scoped timing constraints on a custom module. This module is re-used in many designs. The .xdc file looks like this:

# Scoped constraints for pm_reset_sync_extend.xdc
set_false_path -quiet -to [get_pins -quiet reg_capture_arst_reg[0]/PRE]
set_false_path -quiet -to [get_pins -quiet reg_capture_arst_reg[1]/PRE]
set_false_path -quiet -to [get_pins -quiet QARESET_reg/PRE]

While this is working perfectly on most of my module instances, there are some other instances of the same module which cause Critical Warnings in Synthesis:

[Synth 8-3321] No instance found in 'current_instance cc_sktop/DataPath/bot_n.botlink[0].skTransBot/sync_reset_link[1]' for constraint at line 4 of /localworkspaces/svn/auto_tr_timing/main_fpga/build/cvu125ffvd1517/scoping/scoped_pm_reset_sync_extend.xdc. ["/localworkspaces/svn/auto_tr_timing/main_fpga/build/cvu125ffvd1517/scoping/scoped_pm_reset_sync_extend.xdc":4]

 

The message says that the statement in line 4 (the last line) cannot be applied. However, the register is existing in the Verilog sourcecode and I see that most instances have no problem with that statement. The other constraints (lines 2 and 3) are always correctly applied. The timing results after synthesis look good. I was not expecting to see Critical Warnings because the constraints are using the -quiet parameter which should hide messages if the constaints cannot be applied.

The problem with the Critical Warnings is that they are flooding the report and potentially hiding other serious Critical Warnings.

Can you suggest how to workaround this issue?

Regards,

Thomas

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471 Views
Registered: ‎08-22-2014

Hi,

thanks for the response.

We found a way to re-write the constraint so that no Critical Warnings are reported.

set_false_path -to [get_pins {reg_capture_arst_reg[0]/PRE reg_capture_arst_reg[1]/PRE QARESET_reg/PRE}]

This constraint consolidates all pins in a list and the list will never be empty.

Regards,

Thomas

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Moderator
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Registered: ‎11-04-2010

Hi, @thomas.froehnel ,

If you confirm that the constraint in line 4 do work in the synthesized design, you can try to suppresss the message with "set_msg_config"command. 

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Highlighted
472 Views
Registered: ‎08-22-2014

Hi,

thanks for the response.

We found a way to re-write the constraint so that no Critical Warnings are reported.

set_false_path -to [get_pins {reg_capture_arst_reg[0]/PRE reg_capture_arst_reg[1]/PRE QARESET_reg/PRE}]

This constraint consolidates all pins in a list and the list will never be empty.

Regards,

Thomas

View solution in original post

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