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Visitor berrojo
Visitor
425 Views
Registered: ‎10-09-2018

Setting Output load capacitance for accurate STA on Space Qualified V5QV by using ISE 13.2

 

We would like to perform accurate STA by using actual Output load capacitances on the Space Qualified V5QV (SIRF FPGA) that requires the ISE version 13.2.

 

Could you describe how this can be done?

 

Is there any specific Output load capacitance value used by default in ISE 13.2 for STA on this particular device?

 

1 Reply
Explorer
Explorer
265 Views
Registered: ‎07-18-2018

Re: Setting Output load capacitance for accurate STA on Space Qualified V5QV by using ISE 13.2

I do not believe there is a way to do this with constraints and TRCE, if you contact Xilinx, You might be able to accomplish this with an IBIS model, but if you're using a 5QV part, you should contact xilinx for further information. You might need to use the HSPICE model instead. Both are request only:

https://www.xilinx.com/support/answers/43672.html