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jonmccallum
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Registered: ‎12-10-2013

Timing Summary Takes Forever to Complete

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Hello,

 

I am currently trying to run an implementation on my design.

 

Everything completes with out errors until I get to the Post Route Timing Summary Which gives me a critical Warning:

 

CRITICAL WARNING: [Route 35-39] The design did not meet timing requirements. Please run report_timing_summary for detailed reports.
Resolution: Verify that the timing was met or had small violations at all previous steps (synthesis, placement, power_opt, and phys_opt). Run report_timing_summary and analyze individual timing paths.
INFO: [Route 35-253] TNS is the sum of the worst slack violation on every endpoint in the design. Review the paths with the biggestWNS violations in the timing reports and modify your constraints or your design to improve both WNS and TNS.

 

INFO: [Route 35-20] Post Routing Timing Summary | WNS=-1.631 | TNS=-4.033 | WHS=-0.547 | THS=-1.767 |

 

So I know that My design is not meeting timing spec.

 

When I go back and look through the synthesis, place and opt and phys_opt they all complete successfully.

 

Then when I finally get to the timing summary analysis it will take around 9-10 hours to complete. 

 

The Implementation process gets stuck on this part.

INFO: [Timing 38-91] UpdateTimingParams: Speed grade: -1, Delay Type: min_max, Constraints type: SDC.
INFO: [Timing 38-191] Multithreading enabled for timing update using a maximum of 8 CPUs

 

To invoke the timing Summary I am using all of the default values and only specifying the output log file for the timing report.

 

Is there anyway to speed up the timing analysis and summary portion of the implementation process?

 

Best,

Jon

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hj
Moderator
Moderator
15,559 Views
Registered: ‎06-05-2013
It is the issue with vivado 2013.3 & it will be fixed in 2013.4

So please try to follow the above steps to save your time.

After route_design you can run check_timing to check your timing.

Vivado 2013.4 is not released yet so you have to try this as a workaround. Once it is released you can use your normal flow.

Thanks
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For more information please refer to configuration resources https://forums.xilinx.com/t5/FPGA-Configuration/Configuration-Resources/m-p/753763/highlight/true#M5891
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hj
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Moderator
9,206 Views
Registered: ‎06-05-2013
In the TCL console if you use the following:

opt_design
power_opt_design
place design
phys_opt_design
route_design

commands then this should get you past the problem.

Running of report_timing_summary as part of Implementation was causing Vivado to never finish.

check_timing had the same result

This issue has been fixed in 2013.4

thanks
-------------------------------------------------------------------------------------
For more information please refer to configuration resources https://forums.xilinx.com/t5/FPGA-Configuration/Configuration-Resources/m-p/753763/highlight/true#M5891
-------------------------------------------------------------------------
Don’t forget to reply, kudo, and accept as solution.
-------------------------------------------------------------------------
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jonmccallum
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Registered: ‎12-10-2013

So I need to run the implementation without the timing analysis and then when that finishes I can run the the timing analysis seperately and that should run In a better time?

 

Or do I have to upgrade to 2013.4 in order to get past the long run time for the timing summary ?

 

 

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hj
Moderator
Moderator
15,560 Views
Registered: ‎06-05-2013
It is the issue with vivado 2013.3 & it will be fixed in 2013.4

So please try to follow the above steps to save your time.

After route_design you can run check_timing to check your timing.

Vivado 2013.4 is not released yet so you have to try this as a workaround. Once it is released you can use your normal flow.

Thanks
-------------------------------------------------------------------------------------
For more information please refer to configuration resources https://forums.xilinx.com/t5/FPGA-Configuration/Configuration-Resources/m-p/753763/highlight/true#M5891
-------------------------------------------------------------------------
Don’t forget to reply, kudo, and accept as solution.
-------------------------------------------------------------------------

View solution in original post

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