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Adventurer
Adventurer
425 Views
Registered: ‎06-25-2012

Timing failure in JESD204 IP reset

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I am working on getting a design implemented using JESD204 IP on Ultrascale+, using Vivado 2018.3.

According to the user guide, rx_reset / tx_reset on these cores are asynchronous.

I am getting a timing failure in the async_default group, on a reset path, with a path endings:

  • .../jesd204_adc_rx0_0_reset_block/core_reset_reg_reg/PRE
  • .../jesd204_adc_rx0_0_reset_block/state_reg/PRE
  • .../jesd204_adc_rx0_0_reset_block/stretch_reg[*]/PRE

The source and destination clocks on the paths (for the reset) are unrelated, but I have not specified a set_clock_groups to treat these as asynchronous (too broad a stroke).

The IP documentation does not indicate that specific constraints must be applied to these paths. Can I only assume that proper synchronization logic is present to handle the reset if I were to add a false path?

I have created the following constraints which seem to resolve my issue:

set_false_path -to [get_pins -filter {REF_PIN_NAME=~*PRE} -of_objects [get_cells -hier -filter { NAME =~ "*Adc_Dac_If/*/*_reset_block/core_reset_reg_reg*" }]]
set_false_path -to [get_pins -filter {REF_PIN_NAME=~*PRE} -of_objects [get_cells -hier -filter { NAME =~ "*Adc_Dac_If/*/*_reset_block/state_reg*" }]]
set_false_path -to [get_pins -filter {REF_PIN_NAME=~*PRE} -of_objects [get_cells -hier -filter { NAME =~ "*Adc_Dac_If/*/*_reset_block/stretch_reg[*]*" }]]

Any insights?

I looked in the xdc file supplied with the JESD204 core, and did not see any similar constraints.

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Moderator
Moderator
232 Views
Registered: ‎08-01-2007

回复: Timing failure in JESD204 IP reset

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Yes, you can apply the constraints to fix this issue, the constraints are safe.

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3 Replies
Moderator
Moderator
233 Views
Registered: ‎08-01-2007

回复: Timing failure in JESD204 IP reset

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Yes, you can apply the constraints to fix this issue, the constraints are safe.

View solution in original post

Teacher drjohnsmith
Teacher
225 Views
Registered: ‎07-09-2009

回复: Timing failure in JESD204 IP reset

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@nathanx
wonder if you could add a request to modify the documentation, and / or request the resets are converted to synchronous in the IP block,
Notes in the forum are good , as are answer records, but they are much harder for users to find.
<== If this was helpful, please feel free to give Kudos, and close if it answers your question ==>
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Moderator
Moderator
195 Views
Registered: ‎08-01-2007

回复: Timing failure in JESD204 IP reset

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Until now, we don't see others customer reporting this issue, and the JESD204 IP is no longer maintained, so it will not be fixed.

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