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sarit8
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Registered: ‎08-15-2016

Timing report - How can I get all the path of the design?

 How can I  the timing report get all the path of the design?

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syedz
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Registered: ‎01-16-2013

@sarit8.

 

report_timing_summary is the command which you should look for. Check page 1237 in below User guide:

https://www.xilinx.com/support/documentation/sw_manuals/xilinx2017_2/ug835-vivado-tcl-commands.pdf

 

--Syed

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Did you check our new quick reference timing closure guide (UG1292)?
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sarit8
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Registered: ‎08-15-2016

I tried the following:

report_timing_summary -file C:/sarit/timing.txt , but I didn't get all the paths

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arpansur
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Registered: ‎07-01-2015

Hi @sarit8,

 

Go for report timing summary and increase the number of paths to a large number.

Thanks,
Arpan
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yashp
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Registered: ‎01-16-2013

Hi,

Use below command.

report_timing_summary -file <file name> -delay_type min_max -max_path <no. of paths>

The more you select number of paths the more the size of report. Make sure you have enough RAM to run this command otherwise you may get bad malloc error if you are using local system due to overshoot of memory usage.

Thanks,
Yash
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