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Way
Adventurer
Adventurer
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Registered: ‎10-19-2020

[Vivado 12-4739] get_clocks:No valid object(s) found for '--of_objects [get_pins -hierarchical -filter name=~*/ictl_clk*]'.

Hi,

I am creating a design by referring to Xilinx Displayport example design. In the example design, there is helper core provided and hence I need to create my own custom modules in order to have a modules which has the same functionality like the helper core.

I create a custom IP which contain custom_modules_ooc.xdc and custom_modules_clocks.xdc file. The warning message from synthesis is pointing to the constrain located in custom_modules_clocks.xdc file. I had already make sure that the custom_modules_clocks.xdc is set to LATE in processing order. Hence, i think ordering is not an issue here i guess?

Constraint in my custom_modules_clocks.xdc is "set ictl_clk [get_clocks -of_objects [get_pins -hierarchical -filter {name=~*/ictl_clk*}]]"

I found these two post in the forum. I am also trying to manually key in the constraint in TCL console and it appear to be working fine. Somehow I am still not able to root cause the warning or resolve the warning. Any suggestion on how to resolve/what is the root cause for this warning?

https://forums.xilinx.com/t5/Timing-Analysis/Vivado-12-4739-set-clock-groups-No-valid-object-s-found-for/td-p/896910

https://forums.xilinx.com/t5/Timing-Analysis/Vivado-12-4739-set-false-path-No-valid-object-s-found-get-clocks/td-p/1121343

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Way
Adventurer
Adventurer
312 Views
Registered: ‎10-19-2020

Hi, 

I found out that when I instantiate my RTL module let say A in another module B (Just simple RTL module which instantiate my module A), and package these two modules become custom IP, I did not see the critical warning message anymore when synthesize the custom IP created.  However, the module B contain nothing except instantiate module A into it.

PS: Previously I package only my RTL module (let say A) to become custom IP and I faced critical warning on no object found.

However, I'm still do not understand why it behave in this way. The only differences is the new custom IP has one more hierarchy due to another instantiation. The constraint as mentioned above already contain the hierarchical as one of the argument for get_pins command. When I manually enter the get_pins command, both return the clk with the only differences on the path to the clk due to second one having one more instantiation.

Would like to get some understanding on this kind of behavior. Anyone have any idea why it behave like this? 

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