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Voyager
Voyager
475 Views
Registered: ‎10-12-2016

What is clock pessimism removal ?

Hi friends, 

In timing Analysis i seen the word CPR with small exaplanation. Am not clear with that. Can you please help on this more? 

1) what is it ? 

2) On what it will depend ? 

3) Is it controllable ? 

4) How it will impact setup and hold ? 

Any Suggestions or help is highly appreciated.

Thank You 

S Sampath 

 

0 Kudos
2 Replies
Highlighted
452 Views
Registered: ‎01-22-2015

Re: What is clock pessimism removal ?

@ssampath 

1) what is it ?
2) On what it will depend ?
As explained on about page 221 of UG906, timing analysis analyzes the source and destination clock paths with completely different delays even if the two paths share some common circuitry. That is, it is “more correct” to use the same (rather than different) delay over the common circuitry portion of the paths. Clock pessimism removal (CPR) is a correction to the overly pessimistic approach of normal timing analysis that gets us back to the “more correct” approach.
common_path.jpg
3) Is it controllable ?
Yes. You can turn it off using the following Tcl command, “config_timing_pessimism -disable”. However, this is not advisable and you will get a TIMING_12 warning (see page 292 of UG906). You can open the implemented design and use “report_config_timing -name timing_1” to see if CPR is enabled or disabled.

4) How it will impact setup and hold ?
It is not advisable to turn off CPR because timing analysis will then be overly pessimistic (ie. your design may falsely fail timing analysis).

Cheers,
Mark

Participant karthikeasan
Participant
396 Views
Registered: ‎03-26-2013

Re: What is clock pessimism removal ?

The timing tool always analysis the timing between fastest destination clock path vs slowest data path for setup time requirement and slowest destination clock path vs fastest data path for hold time requirement.

Lets take example for set up time analysis,

Assume clock reaches to destination flop in 1.2ns(fastest time), and data reaches to destination flop in 2ns(slowerst time) then setup slack is going to be -0.8ns(exclude tsu for now).

If you deep dive into data arrival time(2 ns) calculation, you can clearly see that 2ns is calculated based on source clock path(slow) + data path(slow).

Sorce and destination clock shares common circuitry, then comman clock tree section can not have two different delays(fast and slow) in real time.

Theresore, -0.8ns setup slack is not accurate in real time. So the timing tool automatically calculates CPR value and applies in timing calculation to compenstate error introduced by source clock path(slow).