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Voyager
Voyager
9,163 Views
Registered: ‎07-28-2008

Why is IN and OUT of IOBUFDS reported on one timing path ?

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I got a crtical path, from INPUT of of IOBUFDS goes through OUT of IOBUFDS.

 

Vivado 2015.2, Don't understand why are they related, I was expecting T to make totally separate data path.

 

Is there special constraint needed? What am I missing?

 

Thanks,

 

IOBUFDS_path.png

IOBUFDS_path_report.png

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Xilinx Employee
Xilinx Employee
17,116 Views
Registered: ‎05-07-2015

Re: Why is IN and OUT of IOBUFDS reported on one timing path ?

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hi

 

As you can see in the below figure. When T is enabled(i.e '0'). I input not only drives IO port, but also drives O output.
hence I --> O is a valid path.

I understand that you might not consider 'O' output of IOBUFDS as along T is enabled(i.e '0'). 
If you see any timing violation in these kinds of logically unused paths, you can apply a set_false_path constraint on such paths.
As the timing is meeting anyway with reasonable slack. I suggest that you ignore them.

IOBUFDS.JPG

Thanks
Bharath
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Xilinx Employee
Xilinx Employee
9,153 Views
Registered: ‎07-31-2012

Re: Why is IN and OUT of IOBUFDS reported on one timing path ?

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Hi,

 

Do you mean from the input of the IOBUFDS on the external side to the output on the fabric side? Or is this path between both fabric end input and output.

What is the exact path mentioned in the report as a critical path.

 

I dont think this path needs timing as only one of them is active based on the T selection. Probably cross-check other basic timing constraints which you might have missed which are to be applied to the inputs paths. e.g set_input_delay.

Thanks,
Anirudh

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Xilinx Employee
Xilinx Employee
17,117 Views
Registered: ‎05-07-2015

Re: Why is IN and OUT of IOBUFDS reported on one timing path ?

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hi

 

As you can see in the below figure. When T is enabled(i.e '0'). I input not only drives IO port, but also drives O output.
hence I --> O is a valid path.

I understand that you might not consider 'O' output of IOBUFDS as along T is enabled(i.e '0'). 
If you see any timing violation in these kinds of logically unused paths, you can apply a set_false_path constraint on such paths.
As the timing is meeting anyway with reasonable slack. I suggest that you ignore them.

IOBUFDS.JPG

Thanks
Bharath
--------------------------------------------------​--------------------------------------------
Please mark the Answer as "Accept as solution" if information provided addresses your query/concern.
Give Kudos to a post which you think is helpful.
--------------------------------------------------​-------------------------------------------

View solution in original post

Voyager
Voyager
9,055 Views
Registered: ‎07-28-2008

Re: Why is IN and OUT of IOBUFDS reported on one timing path ?

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Thanks for all replies; The diagram is literally accurate. I will add a false path.

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7,970 Views
Registered: ‎07-15-2015

Re: Why is IN and OUT of IOBUFDS reported on one timing path ?

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Link added here for the same topic and scenario when applied to a single-ended (LVCMOS) bidirectional IOBUF:

 

set_disable_timing arc issue vs. set_false_path in bidirectional