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ssampath
Voyager
Voyager
419 Views
Registered: ‎10-12-2016

Will vivado tool suggest best frequency for my design for the choosen board or part ?

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Hi Friends,

Am using vivado 2018.2 and Xilinx part xc7v2000tflg1925-1.

am getting routing issues most of times and some times bit stream is generating. i understood congestion is high as pin LOCs are not properly allocated while designing the external board.

i tried without timing  then there is no issue in PNR. so i want to know what is the best max frequecy i can use so that i will not get any PNR issues ?

Will vivado tool suggest best frequency for my design for the choosen board or part ?

Any help or suggestions are highly appreaciated.

-Sampath

 

-Sampath
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Accepted Solutions
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Registered: ‎01-22-2015

@ssampath 

Just added in the 6Dec19 version of UG949 is “Assessing the Maximum Frequency of the Design” - on page 208.

Mark

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391 Views
Registered: ‎01-22-2015

@ssampath 

Just added in the 6Dec19 version of UG949 is “Assessing the Maximum Frequency of the Design” - on page 208.

Mark

View solution in original post

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