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Voyager
Voyager
241 Views
Registered: ‎10-12-2016

different ways to reduce the number of logic levels in design for improving setup time ?

Hi Friends,

Am getting setup time violations mainly due to more no of logic levels.

Can you please let me know what are the different ways to reduce the number of logic levels in design for improving setup time ?

1) are there any settting before synthesis to reduce the number of logic level ?

2) In PNR(Implementation) are there any options at each stage to reduce number of logic level ?

Any help or suggestions are highly appreciated.

-Sampath

-Sampath
No_Of_LOGIC_levels_are_more_to_XILINX_nov23.PNG
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Scholar richardhead
Scholar
215 Views
Registered: ‎08-01-2012

Re: different ways to reduce the number of logic levels in design for improving setup time ?

The problem here will be the source code. Changing the source is by far the best way to fix this.  put more pipeline registers in your design.  28 logic levels is very excessive.