12-31-2017 12:30 AM
I’dd like to ask community for advice. In our system we have kintex7 fpga. We have 16 ad9467 adc whitch I have to capture synchronously from them. In clearly, I want the phase difference of them be fixed after every on/off. For example, imagine the phase difference between adc1 and adc2 is 50 degree, when I plug off the board and then on, I expect the phase difference between adc1 and adc2 be same (50 degree). But I sometimes observe the phase difference shifted one or two clock. What can I do? My sampling clock is 240 MHz and I attached the component that I use for capturing from adc.
12-31-2017 08:29 AM
We need the board schematics, and the clock distribution scheme. The VHDL for one channel tells me nothing about synchronization. Is the clock to all ADC identical, and matched in length (physical trace/path to clock)?
12-31-2017 09:09 PM
we have an lmk03806 that connected to CDCLVD1216R witch generating differential clock to ADCs. they match in length. The output data and clock of ad9467 connected to different bank of my kintex7, then i use IDDR for capturing data. what can i do for diffrential phase of them be fixed after board off on?
12-31-2017 10:17 PM
my question is why the phase difference between them doesn't match randomly, for example, i on the board and start the capturing, u can see the result in figure 1. then after four time off on the board, i see the phase between them was changed, u can see in the result in figure 2. The time that change the phase is a random number.
01-01-2018 09:08 AM
If you have verified the clock, there is something else very basic you have missed here. To be off 180 degrees on the sine wave is many clocks off, not 50 degrees of the sample clock. Check the reset release, ADC function, IOSERDES reset release, state machine reset release. Use a BUFG to route the reset. Insure the reset is syncronous (not asynchronous).
01-01-2018 10:45 AM
when i see schematic again, i see the length of trace from ADCs to KINTEX is different, so i think the 180 degree difference between between some is acceptable, but i don't understand the phase difference between them changed after the board off and on.