UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

cancel
Showing results for 
Search instead for 
Did you mean: 
Participant sarit8
Participant
2,767 Views
Registered: ‎08-15-2016

mmcm CLOCKOUT1 high fanout

In the timing summary report I can see that I have timing issues (high fanout = 15136) from the  CLOCKOUT1  of the mmcm.

 

Relevant schematic is attached, and the timing report.

 

How can I fix the timing issue from the CLOCKOUT1  of the mmcm (e.g   Source:                 clk_rst_ctrl_i/clk_wiz_0_i/inst/mmcm_adv_inst/CLKOUT1,   Destination:            rx_top_i/demoder_i/corr_res_i/rd_ptr_reg[1]/CE)

 

p.s

I use phys_opt_design command.

Tags (2)
0 Kudos
3 Replies
Xilinx Employee
Xilinx Employee
2,762 Views
Registered: ‎08-01-2008

Re: mmcm CLOCKOUT1 high fanout

refer this ARs
https://www.xilinx.com/support/answers/9410.html
Thanks and Regards
Balkrishan
--------------------------------------------------------------------------------------------
Please mark the post as an answer "Accept as solution" in case it helped resolve your query.
Give kudos in case a post in case it guided to the solution.
0 Kudos
Guide avrumw
Guide
2,748 Views
Registered: ‎01-23-2009

Re: mmcm CLOCKOUT1 high fanout

This is the same thing as your other post.

 

A high fanout of a clock is expected - this is why the clock buffers exist. But they are only used to drive clock pins of clocked cells.

 

Here again, you have the clock signal driving the CE of a cell - this is not a clock pin, and hence should never be directly reached by a clock signal - either directly from the MMCM or through a clock buffer.

 

Avrum

0 Kudos
Moderator
Moderator
2,579 Views
Registered: ‎11-09-2015

Re: mmcm CLOCKOUT1 high fanout

Hi @sarit8,

 

If everything is clear for you on this subject, please mark the thread as solved.

 

Kind Regards,

 

Florent


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**
0 Kudos