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Visitor
Visitor
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Registered: ‎05-30-2017

report_clocks

When I call report_clocks from the Tcl console after synthesis, it returns with "Design has no clocks defined."

When I explicitly defined my external input clock it complained about redefinition, so I removed it again...

Thanks in advance,

Brad

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Xilinx Employee
Xilinx Employee
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Registered: ‎02-27-2019

回复: report_clocks

Hi @bhiggin ,

Do you define it before synthesis? Can you provide the warning(message) of redefinition?

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