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Voyager
Voyager
362 Views
Registered: ‎10-12-2016

what is exatly mean by unconstrained_internal_endpoints ? and how to resolve them ?

HI Friends, 

After synthesis am getting around 51541 unconstrained_internal_endpoints in the check_timing report. 

 

1) Can you please explain what is mean by "unconstrained_internal_endpoints" ? 

2) How to resolve these ? Can you please explain the procedure for resolving these ?

3) Will these cause any implementation issue or functional issue ?

 

Any help or suggestions are highly appreciated. 

-Sam 

 

unconstrainted_internal_endpoints_in_check_timing_to_Xilinx.PNG

 

-Sampath
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Explorer
Explorer
338 Views
Registered: ‎10-12-2018

Re: what is exatly mean by unconstrained_internal_endpoints ? and how to resolve them ?

Hi,

General:

The unconstrained_internal_endpoints are

  1. Internal path, ie. not top-level ports
  2. Unconstrained, which means the compiler won't know the timing requirements, ie.  there is no min/max delay, no explicit false path, and there is no derived constraints from the clocks. (The last one is the most frequently)

In your case:

I guess, that there is no constraint on the source (and the target) clocks. So Vivado cannot find out the clock period, therefore cannot find out the requirements of these paths. Please check out the "no_clock" part of the report. Please send the "Report Clock Networks" results.

Benedek

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Teacher
Teacher
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Registered: ‎07-09-2009

Re: what is exatly mean by unconstrained_internal_endpoints ? and how to resolve them ?

show us your constraints file please
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Xilinx Employee
Xilinx Employee
253 Views
Registered: ‎05-22-2018

Re: what is exatly mean by unconstrained_internal_endpoints ? and how to resolve them ?

Hi @ssampath ,

Firstly:

1.) unconstrained_internal_endpoints:- Number of path endpoints (excluding output ports) without a timing requirement. This number is directly related to missing clock definitions, which is also reported by the no_clock check.

2.) I guess for synthesis you can avoid them but check them after implementation, there significance comes in implemented design.

 

Thanks,

Raj

 

 

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