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Explorer
Explorer
2,470 Views
Registered: ‎09-02-2009

Tandem PROM on PCIE Gen2

Hi experts,

 

In order to meet the 100ms for my PCIE card, the target FPGA is KU035 or KU040, we want to use Tandem PROM method, while our team designed PCIE interface with only PHY level of Xilinx, not the whole IP, we only use from the high speed serial link to 8B/10B, all the other logic is designed by ourselves.

 

In this scenario, can Tandem PROM work for us? If so, do you have any user guide for this, I want to know how much effort I need to spend? 

 

If not, is there any other method to solve this problem?

 

https://forums.xilinx.com/t5/Xcell-Daily-Blog/Do-you-need-an-easy-way-to-quickly-boot-your-PCIe-connected-FPGA/ba-p/366845

 

Thanks

Chris

 

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2 Replies
Xilinx Employee
Xilinx Employee
2,455 Views
Registered: ‎08-01-2008

Re: Tandem PROM on PCIE Gen2

The new Media Configuration Access Port (MCAP) provides a similar connection to the integrated block for PCI Express. A small initial bitstream can be loaded quickly at power-up to enable the PCIe interface, and then the rest of the configuration can be loaded through the PCIe interface - this known as tandem PCIe.

please find detail in this document
https://www.xilinx.com/support/documentation/user_guides/ug570-ultrascale-configuration.pdf

these links can be useful
https://www.xilinx.com/support/answers/64761.html
https://www.xilinx.com/support/documentation/application_notes/xapp1179-tandem-config-pcie.pdf
https://www.xilinx.com/Attachment/Xilinx_Answer_51950.pdf
Thanks and Regards
Balkrishan
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Explorer
Explorer
2,453 Views
Registered: ‎09-02-2009

Re: Tandem PROM on PCIE Gen2

Hi Balkrishan,

 

Thanks for your quick response, while for or my system, I can't load bit stream by PCIe Interface.

 

So I need to learn more about the Tandem PROM.

 

Regards.

Chris

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