01-04-2017 10:30 PM
In order to meet the 100ms for my PCIE card, the target FPGA is KU035 or KU040, we want to use Tandem PROM method, while our team designed PCIE interface with only PHY level of Xilinx, not the whole IP, we only use from the high speed serial link to 8B/10B, all the other logic is designed by ourselves.
In this scenario, can Tandem PROM work for us? If so, do you have any user guide for this, I want to know how much effort I need to spend?
If not, is there any other method to solve this problem?
01-04-2017 11:37 PM
01-04-2017 11:42 PM
Thanks for your quick response, while for or my system, I can't load bit stream by PCIe Interface.
So I need to learn more about the Tandem PROM.