We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

Showing results for 
Search instead for 
Did you mean: 
Newbie jms
Registered: ‎01-04-2019

Ultra scale plus power

We are re-designing a board and repalcing a XCKU5P-3FFVB676E with a XCKU11P-3FFVE1517E. Both designs will perfom the same functions but the newer one will have a few more low speed gerneral purpose IO's added. Will the only difference in power consumption be what is shown in Table 7 of DS922?



0 Kudos
1 Reply
Xilinx Employee
Xilinx Employee
Registered: ‎05-13-2008

Re: Ultra scale plus power

You need to use XPE to understand power dissipation.  The data sheet cannot help with understanding totla device power requirements.  My suggestion based on your description is:

1. Download the lastest US+ XPE from http://www.xilinx.com/power

2. Open the last checkpoint for the completed KU5P design in Vivado.  Run report_power producing a .xpe file.

3.  Import that .xpe file into US+ XPE.

4. Change the device to your new target, XCKU11P-3FFVE1517E.  Ensure that process is et to Max and temperature is set to highest expected operating junction temperature

5. Add any additional circuitry, I/O or other changes you expect for this new revision.

6. Double check the entire XPE for accuracy.

7. Analyze total power to understand if thermal design is adequate.  Look at per rail current to ensure board regulators can deliver adequate power per rail.


Hope that helps.




--  Brian

0 Kudos