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Registered: ‎04-12-2012

Ultrascale - minimum MMCM reset assertion time

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Hello,

Can you please point me to information about the minimum required reset assertion time for MMCMs/ PLLs of the Ultrascale family ?

The minimum reset pulse width that'll successfully invoke a component reset...

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Registered: ‎01-22-2015

Re: Ultrascale - minimum MMCM reset assertion time

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I recall that you are using a Kintex Ultrascale FPGA.  Table 36 of the datasheet, DS892, for this device shows the minimum reset time, MMCM_RSTMINPULSE, for the MMCM is 5.00ns. 

However, UG572 suggest that sometimes the reset time might be longer.  For example, page 49 says that when using CLKINSEL to control the state of the MMCM clock input multiplexers that “The MMCM must be held in RESET during clock switchover”.

Also, Table 3-3 of UG572 says this about RST, "A reset is required when the input clock conditions change".  So, in keeping with the comment on page 49, if you know that the input clock to the MMCM is changing then I suspect it is wise to hold the MMCM in reset until the input clock has stopped changing.

Although, comments in Table 3.3 of UG572 about LOCKED say, “The MMCM automatically locks after power on. No extra reset is required.

Finally, if you have no idea whether the clock input to the MMCM is changing or not, then you must rely on the LOCKED signal - and when you see LOCKED go low then apply the 5ns reset pulse - and wait - and hope that LOCKED goes high again in a reasonable amount of time.

Mark

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136 Views
Registered: ‎01-22-2015

Re: Ultrascale - minimum MMCM reset assertion time

Jump to solution

I recall that you are using a Kintex Ultrascale FPGA.  Table 36 of the datasheet, DS892, for this device shows the minimum reset time, MMCM_RSTMINPULSE, for the MMCM is 5.00ns. 

However, UG572 suggest that sometimes the reset time might be longer.  For example, page 49 says that when using CLKINSEL to control the state of the MMCM clock input multiplexers that “The MMCM must be held in RESET during clock switchover”.

Also, Table 3-3 of UG572 says this about RST, "A reset is required when the input clock conditions change".  So, in keeping with the comment on page 49, if you know that the input clock to the MMCM is changing then I suspect it is wise to hold the MMCM in reset until the input clock has stopped changing.

Although, comments in Table 3.3 of UG572 about LOCKED say, “The MMCM automatically locks after power on. No extra reset is required.

Finally, if you have no idea whether the clock input to the MMCM is changing or not, then you must rely on the LOCKED signal - and when you see LOCKED go low then apply the 5ns reset pulse - and wait - and hope that LOCKED goes high again in a reasonable amount of time.

Mark