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Participant direstraite
Participant
834 次查看
注册日期: ‎05-24-2018

关于ku40jtag的问题

对KU40fpga进行jtag的时候,系统提示以下问题:

WARNING: [Labtools 27-3361] The debug hub core was not detected.
Resolution:
1. Make sure the clock connected to the debug hub (dbg_hub) core is a free running clock and is active.
2. Make sure the BSCAN_SWITCH_USER_MASK device property in Vivado Hardware Manager reflects the user scan chain setting in the design and refresh the device. To determine the user scan chain setting in the design, open the implemented design and use 'get_property C_USER_SCAN_CHAIN [get_debug_cores dbg_hub]'.
For more details on setting the scan chain property, consult the Vivado Debug and Programming User Guide (UG908).

是因为系统晶振没有提供的原因吗?

 

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Xilinx Employee
Xilinx Employee
823 次查看
注册日期: ‎08-26-2010

回复: 关于ku40jtag的问题

Hi @direstraite

 

是的,第一个solution,是指这个debug core的时钟要求是一个free running的时钟,也就是直接提供给FPGA的。第二个solution, User SCAN Chain有4个,如果用的不是默认的第一个,就需要用第二个solution。

Thanks
Simon
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Participant direstraite
Participant
798 次查看
注册日期: ‎05-24-2018

回复: 关于ku40jtag的问题

jtag完成之后的状态显示

1.jpg

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Participant direstraite
Participant
797 次查看
注册日期: ‎05-24-2018

回复: 关于ku40jtag的问题

这是不是表明jtag(配置电路本身)是正常的?

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Xilinx Employee
Xilinx Employee
782 次查看
注册日期: ‎08-26-2010

回复: 关于ku40jtag的问题

看config_status的bit13和bit14

Thanks
Simon
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