修改时间 05-13-2020 11:21 AM
IDELAY/ODELAY的Tap 的分辨率由IDELAYCTRL 的Reference clock frequency 决定.
修改时间 05-13-2020 12:16 PM
The resolution of the Tap of I DELAY / ODELAY is determined by the Reference clock frequency of IDELAYCTRL
While this is true of a 7 series device, it is not true of UltraScale/UltraScale+.
In the 7 series devices, there are 32 taps in the delay chain, and each is calibrated to a known delay using the IDELAYCTRL's reference clock - with each tap being Tref_clk/64.
In the UltraScale/UltraScale+, the taps themselves are not calibrated - this is why the datasheet gives the delays as being between 2.5ps and 15ps - this is the variation over Process, Voltage and Temperature (PVT). There is nothing you can do to change this - this is the physical characteristic of the tap.
In UltraScale/UltraScale+, rather than try and calibrate the tap, you have two modes: