** Error: [XPM_FIFO 15-7] Read Data Count is enabled, but RD_DATA_COUNT_WIDTH (8) value is outside of legal range. RD_DATA_COUNT_WIDTH value must be between 0 and 5.

[dannyjacobs]

Hi,

For my design I am using the XPM_FIFO_SYNC-macro, but modelsim generates an error:

** Error: [XPM_FIFO 15-7] Read Data Count is enabled, but RD_DATA_COUNT_WIDTH (8) value is outside of legal range. RD_DATA_COUNT_WIDTH value must be between 0 and 5.

If I look at UG974 then this value should be correct, because the value should be between 1 and 23:

Can anybody explain what's going wrong here?

Thanks in advance.

Cheers,

Danny

[pthakare]

Hi @dannyjacobs 

What is the FIFO_READ_DEPTH in your instatiation ? 

additionally to reflect correct valu e, the width should be  log2(FIFO_READ_DEPTH)+1

[dannyjacobs]

Hi pthakare,

My write width is 72, read is 576 and I can only assign FIFO_WRITE_DEPTH which is 128.

Cheers,

Danny

[pthakare · Accepted solution]

Hi @dannyjacobs 

According to your write_width , read_width and write_depth,  the read_depth  = (128*72)/576  =  16, 

so you need log2(FIFO_READ_DEPTH)+1 = 5 bits only for RD_DATA_COUNT_WIDTH

Hence the RD_DATA_COUNT_WIDTH value must be between 1  and 5 more correctly .  5 bits are required to reflect the correct value , but it you use fewer bits (1 to 4)  you will get count value which is LSB truncated.

[dannyjacobs]

Yes, works perfectly now. Thank you for your help.

Cheers,

Danny