UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

cancel
Showing results for 
Search instead for 
Did you mean: 
Highlighted
Visitor markmiw
Visitor
491 Views
Registered: ‎02-28-2019

Kintex Ultrascale+ Ibis Model Description

Jump to solution

I am trying to get some clarification on some of the models in kintexuplus.ibs

 

Particularly I wanted to know the difference between...

 

HP_LVDS

HP_SUB_LVDS

HP_LVDS_DT_I

HP_LVDS_DT_AC_COUPLED_I

HP_LVDS_PE1600

HP_LVDS_MAIN

HP_LVDS_PE

 

I am assuming HP_LVDS vs HP_LVDS_DT_I is that HP_LVDS_DT_I has an internal 100 ohm termination?

0 Kudos
1 Solution

Accepted Solutions
Moderator
Moderator
448 Views
Registered: ‎07-23-2015

Re: Kintex Ultrascale+ Ibis Model Description

Jump to solution

@markmiw  

HP_LVDS:  LVDS with no internal termination

HP_SUB_LVDS:  SUB_LVDS Buffer

HP_LVDS_DT_I:  LVDS Input with internal termination (DIFF_TERM)

HP_LVDS_DT_AC_COUPLED_I: LVDS input for AC coupled links

HP_LVDS_PE1600: LVDS with Pre-Emphasis 

HP_LVDS_MAIN & HP_LVDS_PE: Used in HP_LVDS_PE1600 under [Driver Schedule] 

Do take a look at Table 1-55 UG571 v1.10 Page#128 for attributes of LVDS IO standard that will help you understand the above.  

The recommended method to generate IBIS model is through Vivado so that it maps the corresponding IBIS model to your pinout based on your settings. Do take a look at this blog post I authored where I described the method to generate IBIS model from Vivado 

https://forums.xilinx.com/t5/Design-and-Debug-Techniques-Blog/The-World-of-Hardware-Simulation/ba-p/936961

- Giri
--------------------------------------------------------------------------------------------------------------------
There's no such thing as a stupid question. Feel free to ask but do a quick search to make sure it ain't already answered.
Keep conversing, give Kudos and Accept Solution when you get one.
-----------------------------------------------------------------------------------------------------------------------

View solution in original post

0 Kudos
2 Replies
Moderator
Moderator
449 Views
Registered: ‎07-23-2015

Re: Kintex Ultrascale+ Ibis Model Description

Jump to solution

@markmiw  

HP_LVDS:  LVDS with no internal termination

HP_SUB_LVDS:  SUB_LVDS Buffer

HP_LVDS_DT_I:  LVDS Input with internal termination (DIFF_TERM)

HP_LVDS_DT_AC_COUPLED_I: LVDS input for AC coupled links

HP_LVDS_PE1600: LVDS with Pre-Emphasis 

HP_LVDS_MAIN & HP_LVDS_PE: Used in HP_LVDS_PE1600 under [Driver Schedule] 

Do take a look at Table 1-55 UG571 v1.10 Page#128 for attributes of LVDS IO standard that will help you understand the above.  

The recommended method to generate IBIS model is through Vivado so that it maps the corresponding IBIS model to your pinout based on your settings. Do take a look at this blog post I authored where I described the method to generate IBIS model from Vivado 

https://forums.xilinx.com/t5/Design-and-Debug-Techniques-Blog/The-World-of-Hardware-Simulation/ba-p/936961

- Giri
--------------------------------------------------------------------------------------------------------------------
There's no such thing as a stupid question. Feel free to ask but do a quick search to make sure it ain't already answered.
Keep conversing, give Kudos and Accept Solution when you get one.
-----------------------------------------------------------------------------------------------------------------------

View solution in original post

0 Kudos
Visitor markmiw
Visitor
436 Views
Registered: ‎02-28-2019

Re: Kintex Ultrascale+ Ibis Model Description

Jump to solution

Thank you!

0 Kudos