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Visitor
Visitor
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Registered: ‎02-24-2019

LVDS DDR ADC output data capture

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Currently using the High Speed Select I/O Wizard to capture serialized data from ADC. The deserialization factor is set to 4 but I want to have it at 2. How would approach this problem, I've heard that I can just do some bit mapping in order to pull this off but I need some more context. 

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Xilinx Employee
Xilinx Employee
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Registered: ‎06-02-2017

回复: LVDS DDR ADC output data capture

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Hi @achen58 ,

Just confirm you are using DDR mode in this application? If so, the DATA_WIDTH is limited to 4,6,8,10 or 14. You can refer to UG471.

If you want to recevie data with 2:1 DATA_WIDTH , one option is use somrthing similar to oversampling. That means you use high ratio to receive data, for example you use 4:1 to receive 2:1 coming data, so you will get 2 bits for 1 valid bit. After receiving, you need to filter out valid data by logic design. It will not be very difficult.

Hope it helps.

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Xilinx Employee
Xilinx Employee
538 Views
Registered: ‎06-02-2017

回复: LVDS DDR ADC output data capture

Jump to solution

Hi @achen58 ,

Just confirm you are using DDR mode in this application? If so, the DATA_WIDTH is limited to 4,6,8,10 or 14. You can refer to UG471.

If you want to recevie data with 2:1 DATA_WIDTH , one option is use somrthing similar to oversampling. That means you use high ratio to receive data, for example you use 4:1 to receive 2:1 coming data, so you will get 2 bits for 1 valid bit. After receiving, you need to filter out valid data by logic design. It will not be very difficult.

Hope it helps.

-------------------------------------------------------------------------------------------------------------------------------------------
Kindly note- Please mark the Answer as "Accept as solution" if information provided is helpful.

Give Kudos to a post which you think is helpful and reply oriented.
--------------------------------------------------------------------------------------------------------------------------------------------

View solution in original post