08-24-2020 09:37 AM
I'm trying to use an external 10MHz reference as the input to the LMK04208 chip on the ZCU111 and have the resulting clock be synced in phase relative to the reference clock. I've gotten to the point where I can generate a stable output off of the external 10MHz reference, but it seems like phase syncing requires using CLKin1 as a feedback clock instead of an input source.
Is there any way to do an internal feedback (instead of external) with the 0-Delay setting and have the device phase synced to the input clock?
TICS Pro .tcs file renamed to .tcs.txt due to forum restrictions....
09-23-2020 01:07 PM
probably more of a question for the TI forum.
i've used clkout5 here to synch to an external instrument before but i've not used an external input to clock this PLL.
I heard a proposal to use a 10mhz input let me check to see if i have a TicsPro profile that does this.
09-23-2020 01:49 PM
11-25-2020 02:57 AM
02-25-2021 06:40 AM
Your 'R divider' and 'N divider' settings don't look right for 10MHz reference clock input. For me it seems your settings won't effect in correct synchronization to 10MHz (before even getting into phase synchronization). Check out the answer I provided here about synchronization to external 10MHz reference and see if it helps: https://forums.xilinx.com/t5/Versal-and-UltraScale/Synchronize-external-LO-with-ZCU111/td-p/1043394
02-25-2021 08:06 AM
@ptrkrysikthe R & N settings were correct for my application because the downstream PLLs are being configured to generate a 1.28GHz sample clock and this give the proper starting frequency. I still have not found good documentation on phase synchronization but have been able to put that on the back burner.
02-26-2021 01:04 AM
@dcwhiteheadare you able to phase synchronize tiles on single ZCU111? The documentation says that MTS (Multi-Tile Synchronization) is needed for this to work and MTS requires configuration of additional clocks. Especially SYSREF_RFSOC clock on CLKout1 of LMK04208. I haven't tried MTS myself yet.